Patents by Inventor Mikito Nakabayashi

Mikito Nakabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7117296
    Abstract: A non-volatile semiconductor memory device includes a memory cell array in which electrically erasable and programmable memory cells are arrayed, each of the memory cells storing therein a first logic state with a threshold voltage lower than or equal to a first value or a second logic state with a threshold voltage higher than or equal to a second value that is higher than the first value, a data hold circuit for holding program data and sensing data as read out of the memory cell array, and a controller configured to control a program sequence, wherein the controller has the control functions of: a program control function for applying a program voltage to a selected memory cell of the memory cell array to let the data shift from the first logic state to the second logic state; a program verify control function for verifying that the programmed data of the selected memory cell shifted to the second logic state; an erratic program verify control function for checking that the threshold voltage of a memory ce
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: October 3, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hosono, Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai
  • Publication number: 20050185468
    Abstract: A non-volatile semiconductor memory device includes a memory cell array in which electrically erasable and programmable memory cells are arrayed, each of the memory cells storing therein a first logic state with a threshold voltage lower than or equal to a first value or a second logic state with a threshold voltage higher than or equal to a second value that is higher than the first value, a data hold circuit for holding program data and sensing data as read out of the memory cell array, and a controller configured to control a program sequence, wherein the controller has the control functions of: a program control function for applying a program voltage to a selected memory cell of the memory cell array to let the data shift from the first logic state to the second logic state; a program verify control function for verifying that the programmed data of the selected memory cell shifted to the second logic state; an erratic program verify control function for checking that the threshold voltage of a memory ce
    Type: Application
    Filed: April 28, 2005
    Publication date: August 25, 2005
    Inventors: Koji Hosono, Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai
  • Patent number: 6907497
    Abstract: A non-volatile semiconductor memory device includes a memory cell array, a data hold circuit, and a controller A program control function applies a program voltage to a selected memory cell to let data shift from a first logic state to a second logic state. A program verify control function verifies that a programmed data of the selected memory cell shifted to the second logic state. An erratic program verify control function checks that a threshold voltage of a memory cell to be held in the first logic state does not exceed a third value set as an upper limit value of a variation of the first logic state. An over-program verify control function checks that a threshold voltage of the selected memory cell shifted to the second logic state does not exceed a fourth value set as an upper limit thereof.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: June 14, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Hosono, Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai
  • Publication number: 20030214853
    Abstract: A non-volatile semiconductor memory device includes a memory cell array in which electrically erasable and programmable memory cells are arrayed, each of the memory cells storing therein a first logic state with a threshold voltage lower than or equal to a first value or a second logic state with a threshold voltage higher than or equal to a second value that is higher than the first value, a data hold circuit for holding program data and sensing data as read out of the memory cell array, and a controller configured to control a program sequence, wherein the controller has the control functions of: a program control function for applying a program voltage to a selected memory cell of the memory cell array to let the data shift from the first logic state to the second logic state; a program verify control function for verifying that the programmed data of the selected memory cell shifted to the second logic state; an erratic program verify control function for checking that the threshold voltage of a memory ce
    Type: Application
    Filed: December 20, 2002
    Publication date: November 20, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji Hosono, Kenichi Imamiya, Hiroshi Nakamura, Mikito Nakabayashi, Koichi Kawai
  • Patent number: 6446177
    Abstract: In a memory system using a removable recording medium and data stored in the recording medium, identifying information for identifying each recording medium from others is held in the recording medium, and when data stored in the recording medium is used, the identifying information of the recording medium is required. As a result, when a flash memory card, etc. is used, a copyright is reliably protected.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: September 3, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Hiroshi Nakamura, Hiroshi Sukegawa, Mikito Nakabayashi, Kazuya Kawamoto
  • Patent number: RE42398
    Abstract: In a memory system using a removable recording medium and data stored in the recording medium, identifying information for identifying each recording medium from others is held in the recording medium, and when data stored in the recording medium is used, the identifying information of the recording medium is required. As a result, when a flash memory card, etc. is used, a copyright is reliably protected.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: May 24, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Hiroshi Nakamura, Hiroshi Sukegawa, Mikito Nakabayashi, Kazuya Kawamoto
  • Patent number: RE44503
    Abstract: In a memory system using a removable recording medium and data stored in the recording medium, identifying information for identifying each recording medium from others is held in the recording medium, and when data stored in the recording medium is used, the identifying information of the recording medium is required. As a result, when a flash memory card, etc. is used, a copyright is reliably protected.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: September 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Tanaka, Hiroshi Nakamura, Hiroshi Sukegawa, Mikito Nakabayashi, Kazuya Kawamoto