Patents by Inventor Mikko Lipasti

Mikko Lipasti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9952870
    Abstract: An apparatus and method for filtering biased conditional branches in a branch predictor in favor of non-biased conditional branches are disclosed. Biased conditional branches, which are consistently skewed toward one direction or outcome, are filtered such that an increased number of non-biased conditional branches which resolve in both directions may be considered. As a result, more useful branches may be captured over larger distances, thereby providing correlations deeper in a global history. In addition, by tracking only the latest occurrences of non-biased conditional branches using a recency stack structure, even more distant branch correlations may be made.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: April 24, 2018
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Mikko Lipasti, Dibakar Gope
  • Patent number: 9626297
    Abstract: A computer architecture addresses intermittent memory faults by exploiting redundancy inherent in a hierarchical memory structure, for example, as data moves through various cache levels and registers before use by the processor. Accesses to data from faulted memory areas is diverted to a secondary memory structure holding that data and the secondary memory structure is flagged to increase the persistence of the stored data used for patching against normal updating policies.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: April 18, 2017
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: David John Palframan, Nam Sung Kim, Mikko Lipasti
  • Publication number: 20160103729
    Abstract: A computer architecture addresses intermittent memory faults by exploiting redundancy inherent in a hierarchical memory structure, for example, as data moves through various cache levels and registers before use by the processor. Accesses to data from faulted memory areas is diverted to a secondary memory structure holding that data and the secondary memory structure is flagged to increase the persistence of the stored data used for patching against normal updating policies.
    Type: Application
    Filed: October 8, 2014
    Publication date: April 14, 2016
    Inventors: David John Palframan, Nam Sung Kim, Mikko Lipasti
  • Patent number: 9235461
    Abstract: Hardening of an integrated circuit such as a GPU processor to soft errors caused by particle strikes is applied selectively to the set of devices according to the magnitude of error resulting from this soft error for the particular device. This approach differs from approaches that protect all devices, all devices likely to produce an output error, or all devices that are vulnerable.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: January 12, 2016
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: David John Palframan, Nam Sung Kim, Mikko Lipasti
  • Publication number: 20150363203
    Abstract: Aspects of the present invention provide an apparatus and method for filtering biased conditional branches in a branch predictor in favor of non-biased conditional branches. Biased conditional branches, which are consistently skewed toward one direction or outcome, are filtered such that an increased number of non-biased conditional branches which resolve in both directions may be considered. As a result, more useful branches may be captured over larger distances, thereby providing correlations deeper in a global history to provide greater prediction accuracy. In addition, by tracking only the latest occurrences of non-biased conditional branches using a recency stack structure, even more distant branch correlations may be made.
    Type: Application
    Filed: June 13, 2014
    Publication date: December 17, 2015
    Inventors: Mikko Lipasti, Dibakar Gope
  • Publication number: 20150234693
    Abstract: Hardening of an integrated circuit such as a GPU processor to soft errors caused by particle strikes is applied selectively to the set of devices according to the magnitude of error resulting from this soft error for the particular device. This approach differs from approaches that protect all devices, all devices likely to produce an output error, or all devices that are vulnerable.
    Type: Application
    Filed: February 14, 2014
    Publication date: August 20, 2015
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: David John Palframan, Nam Sung Kim, Mikko Lipasti