Abstract: A dynamic random access memory includes a first conductivity type semiconductor substrate (40), a plurality of word lines (1a, 1b, 1c, 1d), a plurality of bit lines (2a, 2b) and a plurality of memory cells (3). The memory cells (3) are provided at the intersections between the word lines (1a, 1b, 1c, 1d) and the bit lines (2a, 2b). Each of the memory cells (3) includes a pair of impurity regions (6a, 6b) of a second conductivity type, a gate electrode (8) connected to the word line (1a, 1b, 1c, 1d), a storage node (9) and a cell plate (11). A capacitor (5) including the storage node (9) and the cell plate (11) is located above the bit lines (2a, 2b). The storage node (9) is formed to extend from a bottom surface to a side surface of a hole (Ct1, Ct2) formed in an insulator layer (14a, 14b) so as to extend to a surface of one impurity region (6a). The cell plate (11) is formed to interpose the storage node (9) between two layers thereof along the bottom surface and the side surface of the hole (Ct1, Ct2).