Patents by Inventor Milad Sharif

Milad Sharif has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12242403
    Abstract: A system is presented that includes two data processing systems that are coupled via a network, each data processing system including a reconfigurable processor with a reconfigurable processor memory, a host that is coupled to the reconfigurable processor and that includes a host processor and a host memory that is coupled to the host processor, and a network interface controller (NIC) that is operatively coupled to the reconfigurable processor and to the host processor. The reconfigurable processor of one of the data processing systems is configured to implement a virtual function that uses a virtual address for a memory access operation. An application programming interface (API) in the host processor translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct memory access operation at the reconfigurable processor memory or the host memory of the other data processing system.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: March 4, 2025
    Assignee: SambaNova Systems, Inc.
    Inventors: Conrad Alexander Turlik, Sudhakar Dindukurti, Anand Misra, Arjun Sabnis, Milad Sharif, Ravinder Kumar, Joshua Earle Polzin, Arnav Goel, Steven Dai
  • Publication number: 20240273057
    Abstract: A host system for executing an application on first and/or second reconfigurable processors is presented. The host system is operatively coupled to the first and second reconfigurable processors, whereby the first reconfigurable processors have a first architecture, and the second reconfigurable processors have a second architecture that is different than the first architecture. The host system allocates reconfigurable processors of the first and/or second reconfigurable processors for executing the application and includes an auto-discovery module that is configured to determine whether the allocated reconfigurable processors include at least one of the first reconfigurable processors.
    Type: Application
    Filed: April 15, 2024
    Publication date: August 15, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Greg DYKEMA, Maran WILSON, Guoyao FENG, Kuan ZHOU, Tianyu SUN, Taylor LEE, Kin Hing LEUNG, Arnav GOEL, Conrad Alexander TURLIK, Milad SHARIF
  • Publication number: 20240231903
    Abstract: In a computer-implemented method a Dynamic Transfer Engine (DTE) included in a computing system receives a dynamic stimulus associated with transfer of stage data during execution of a dataflow application by the system. The DTE determines, based on source and destination devices of the transfer, a transfer method and a transfer channel to transfer the stage data between memories coupled to the source and destination devices. The DTE acquires, hardware resources of the computing system to transfer the stage using the channel and, initiates the transfer. A computer program product can cause one or more processors to perform the method. A computing system can comprise source and destination processors and memories, hardware channels to transfer data between the memories, a resource manager, and a DTE configured to perform the method.
    Type: Application
    Filed: March 23, 2024
    Publication date: July 11, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Qi ZHENG, Arnav GOEL, Conrad Alexander TURLIK, Guoyao FENG, Joshua Earle POLZIN, Fansheng CHENG, Ravinder KUMAR, Greg DYKEMA, Subhra MAZUMDAR, Milad SHARIF, Jiayu BAI, Neal SANGHVI, Arjun SABNIS, Letao CHEN
  • Patent number: 11983141
    Abstract: A system for executing an application on a pool of reconfigurable processors with first and second reconfigurable processors having first and second architectures that are different from each other is presented. The system comprises an archive of configuration files with first and second configuration files for executing the application on the first and second reconfigurable processors, respectively, and a host system that is operatively coupled to the first and second reconfigurable processors. The host system comprises a runtime processor that allocates reconfigurable processors for executing the application and an auto-discovery module that is configured to perform discovery of whether the reconfigurable processors include at least one of the first reconfigurable processors and whether the reconfigurable processors include at least one of the second reconfigurable processors.
    Type: Grant
    Filed: September 9, 2022
    Date of Patent: May 14, 2024
    Assignee: SambaNova Systems, Inc.
    Inventors: Greg Dykema, Maran Wilson, Guoyao Feng, Kuan Zhou, Tianyu Sun, Taylor Lee, Kin Hing Leung, Arnav Goel, Conrad Turlik, Milad Sharif
  • Publication number: 20230388373
    Abstract: A data processing system is presented in a client-server configuration for executing first and second applications that a client in the client-server configuration can offload for execution onto the data processing system. The data processing system includes a server and a pool of reconfigurable data flow resources that is configured to execute the first application in a first runtime context and the second application in a second runtime context. The server is configured to establish a session with the client, receive first and second execution requests for executing the first application and the second application from the client, start respective first and second execution of the first and second applications in the respective first and second runtime contexts in response to receiving the first and second execution requests, and balance a first load from the first execution with a second load from the second execution.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 30, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Milad SHARIF, Ravinder KUMAR, Qi ZHENG, Neal SANGHVI, Jiayu BAI, Arnav GOEL
  • Publication number: 20230333879
    Abstract: A data processing system is presented that is configured as a server in a client-server configuration for executing applications that a client in the client-server configuration can offload as execution tasks for execution on the server. The data processing system includes a reconfigurable processor, a storage device that stores configuration files for the applications, and a host processor that is coupled to the storage device and to the reconfigurable processor. The host processor is configured to receive an execution task of the execution tasks with an identifier of an application from the client, retrieve a configuration file that is associated with the application from the storage device using the identifier of the application, configure the reconfigurable processor with the configuration file, and start execution of the application on the reconfigurable processor, whereby the reconfigurable processor provides output data of the execution of the application to the client.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 19, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Arnav GOEL, Ravinder KUMAR, Qi ZHENG, Milad SHARIF, Jiayu BAI, Neal SANGHVI
  • Publication number: 20230297527
    Abstract: A system is presented that includes two data processing systems that are coupled via a network, each data processing system including a reconfigurable processor with a reconfigurable processor memory, a host that is coupled to the reconfigurable processor and that includes a host processor and a host memory that is coupled to the host processor, and a network interface controller (NIC) that is operatively coupled to the reconfigurable processor and to the host processor. The reconfigurable processor of one of the data processing systems is configured to implement a virtual function that uses a virtual address for a memory access operation. An application programming interface (API) in the host processor translates the virtual address into a physical address, and the NIC uses the physical address to initiate a direct memory access operation at the reconfigurable processor memory or the host memory of the other data processing system.
    Type: Application
    Filed: March 14, 2023
    Publication date: September 21, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Conrad Alexander TURLIK, Sudhakar DINDUKURTI, Anand MISRA, Arjun SABNIS, Milad SHARIF, Ravinder KUMAR, Joshua Earle POLZIN, Arnav GOEL, Steven DAI
  • Publication number: 20230259823
    Abstract: In a method an orchestrator of a computing system determines that results of Machine Learning model computations are available and dispatches a worker to perform model computations that include computing gradients of the results. The orchestrator determines that a set of gradients of the results is available and dispatches a gradient worker to compute a sum of the gradients. The orchestrator determines that a second set of gradients of the results is available and dispatches a second gradient worker to compute a sum of the second set of gradients. The orchestrator determines that the sums of the first and second gradients are available and dispatches a third gradient worker to compute synchronized gradients. The gradient workers compute the sums and synchronized gradients concurrent with training workers computing additional model computations results and/or gradients. A computer program product can include the method and a computing system can include the orchestrator.
    Type: Application
    Filed: February 13, 2023
    Publication date: August 17, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Greg DYKEMA, Fansheng CHENG, Kuan ZHOU, Arnav GOEL, Subhra MAZUMDAR, Milad SHARIF, Po-Yu WU, Bowen YANG, Qi ZHENG
  • Publication number: 20230237012
    Abstract: A system for executing an application on a pool of reconfigurable processors with first and second reconfigurable processors having first and second architectures that are different from each other is presented. The system comprises an archive of configuration files with first and second configuration files for executing the application on the first and second reconfigurable processors, respectively, and a host system that is operatively coupled to the first and second reconfigurable processors. The host system comprises a runtime processor that allocates reconfigurable processors for executing the application and an auto-discovery module that is configured to perform discovery of whether the reconfigurable processors include at least one of the first reconfigurable processors and whether the reconfigurable processors include at least one of the second reconfigurable processors.
    Type: Application
    Filed: September 9, 2022
    Publication date: July 27, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Greg Dykema, Maran Wilson, Guoyao Feng, Kuan Zhou, Tianyu Sun, Taylor Lee, Kin Hing LEUNG, Arnav Goel, Conrad Turlik, Milad Sharif
  • Publication number: 20230237013
    Abstract: A system for a data-parallel execution of at least two implementations of an application on reconfigurable processors with different layouts is presented. The system comprises a pool of reconfigurable data flow resources with data transfer resources that interconnect first and second reconfigurable processors having first and second layouts that impose respective first and second constraints for the data-parallel execution of the application. The system further comprises an archive of configuration files and a host system that is operatively coupled to the first and second reconfigurable processors. The host system comprises first and second compilers that generate for the application, based on the respective first and second constraints, first and second configuration files that are stored in the archive of configuration files and adapted to be executed data-parallel compatible on respective first and second reconfigurable processors.
    Type: Application
    Filed: September 9, 2022
    Publication date: July 27, 2023
    Applicant: SambaNova Systems, Inc.
    Inventors: Greg Dykema, Maran Wilson, Guoyao Feng, Kuan Zhou, Tianyu Sun, Taylor Lee, Kin Hing LEUNG, Arnav Goel, Conrad Turlik, Milad Sharif
  • Patent number: 10826815
    Abstract: Some embodiments provide a method for a forwarding element (FE) operating in a network of FEs. The method receives a data message with an access control list (ACL) rule and a first digest for the ACL rule appended to the data message. The ACL rule specifies that the packet is allowed to be sent through the network. The method verifies the ACL rule by computing a second digest from the ACL rule using a secret key and comparing the first digest to the second digest. The method determines whether the packet matches the ACL rule by comparing values in headers of the data message to values specified in the ACL rule. The method only forwards the data message if the ACL rule is verified and the packet matches the ACL rule.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: November 3, 2020
    Assignee: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule
  • Patent number: 10791046
    Abstract: A method of forwarding packets by a physical network switch is provided. The method assigns egress ports that connect the network switch to each particular next hop to a weighted-cost multipathing (WCMP) group associated with the particular next hop. The method assigns weights to each egress port in each WCMP group according to the capacity of each path that connects the egress port to the next hop associated with the WCMP group and normalizes the weights over a range of values. For each packet received at the network switch, the method identifies the WCMP group associated with a next hop destination of the packet. The method calculates a hash value of a set of fields in the packet header and uses the hash value to perform a range lookup in the identified WCMP group to select an egress port for forwarding the packet to the next hop.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: September 29, 2020
    Assignee: Barefoot Networks, Inc.
    Inventors: Milad Sharif, Parag Bhide, Vasanth Kumar, Chaitanya Kodeboyina
  • Patent number: 10778583
    Abstract: Some embodiments provide a method for configuring unit memories (e.g., unit static random access memories (SRAMs) and ternary content addressable memories (TCAMs) of a network forwarding IC to implement a set of longest prefix matching (LPM) tables. Two different methods of providing a longest prefix match (LPM) operation that minimize the use of ternary content addressable memory (TCAM) are presented. Each method takes advantage of the use of match-action stages and the programmability of the unit memories. An algorithmic LPM embodiment is presented which uses a TCAM index with pointers to SRAM partitions that store subtrees of a routing tree (routing trie structure) and performs subtree rearrangements in the partitions upon the addition of certain routing entries. A chained LPM embodiment, allocates separate exact-match tables for a set of address prefix lengths in, for example, SRAMS, as well as a set of non-exact match tables in, for example, TCAMs.
    Type: Grant
    Filed: March 21, 2018
    Date of Patent: September 15, 2020
    Assignee: Barefoot Networks, Inc.
    Inventor: Milad Sharif
  • Patent number: 10764170
    Abstract: Some embodiments provide a method for a particular FE in a network of FEs. The method receives a data message at a first port of the FE. The data message includes a header that specifies an egress port for each FE along a path from a source of the data message to a destination of the data message and an ingress port for at least each FE along the path that the data message has previously traversed. The method determines that the particular egress port specified for the FE is a second port that is not operational. The method generates a path failure message specifying that the second port is not operational and including a header that uses the egress ports and ingress ports in the data message. The method sends the path failure message out of the first port for delivery to the source of the data message.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: September 1, 2020
    Assignee: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule
  • Patent number: 10757005
    Abstract: Some embodiments provide a method for a particular forwarding element (FE) in a network of FEs. The method receives a packet at the particular FE. The packet includes a packet header that includes, for each of multiple FEs along a path from a source of the packet to a destination of the packet, (i) an identifier for the FE and (ii) a set of one or more actions for the FE to perform on the packet. The method parses the packet header to identify the set of actions for the particular FE. The method performs the identified set of actions.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 25, 2020
    Assignee: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule
  • Patent number: 10700959
    Abstract: Some embodiments provide a network that includes (i) multiple forwarding elements, (ii) a set of one or more global control plane (GCP) servers, and (iii) multiple end-node machines. The GCP servers maintain topological information about connections between the forwarding elements. Each of the end-node machines receives the topological information, identifies a source-routing path for a message sent by the machine, and embeds the source-routing path in a source-routing message header that includes an egress port for each forwarding element along the path.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: June 30, 2020
    Assignee: Barefoot Networks, Inc.
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule
  • Publication number: 20190280975
    Abstract: Some embodiments provide a method for configuring unit memories (e.g., unit static random access memories (SRAMs) and ternary content addressable memories (TCAMs) of a network forwarding IC to implement a set of longest prefix matching (LPM) tables. Two different methods of providing a longest prefix match (LPM) operation that minimize the use of ternary content addressable memory (TCAM) are presented. Each method takes advantage of the use of match-action stages and the programmability of the unit memories. An algorithmic LPM embodiment is presented which uses a TCAM index with pointers to SRAM partitions that store subtrees of a routing tree (routing trie structure) and performs subtree rearrangements in the partitions upon the addition of certain routing entries. A chained LPM embodiment, allocates separate exact-match tables for a set of address prefix lengths in, for example, SRAMS, as well as a set of non-exact match tables in, for example, TCAMs.
    Type: Application
    Filed: March 21, 2018
    Publication date: September 12, 2019
    Inventor: Milad Sharif
  • Publication number: 20190190816
    Abstract: A method of forwarding packets by a physical network switch is provided. The method assigns egress ports that connect the network switch to each particular next hop to a weighted-cost multipathing (WCMP) group associated with the particular next hop. The method assigns weights to each egress port in each WCMP group according to the capacity of each path that connects the egress port to the next hop associated with the WCMP group and normalizes the weights over a range of values. For each packet received at the network switch, the method identifies the WCMP group associated with a next hop destination of the packet. The method calculates a hash value of a set of fields in the packet header and uses the hash value to perform a range lookup in the identified WCMP group to select an egress port for forwarding the packet to the next hop.
    Type: Application
    Filed: August 22, 2018
    Publication date: June 20, 2019
    Inventors: Milad Sharif, Parag Bhide, Vasanth Kumar, Chaitanya Kodeboyina
  • Publication number: 20190182149
    Abstract: Some embodiments provide a method for a particular FE in a network of FEs. The method receives a data message at a first port of the FE. The data message includes a header that specifies an egress port for each FE along a path from a source of the data message to a destination of the data message and an ingress port for at least each FE along the path that the data message has previously traversed. The method determines that the particular egress port specified for the FE is a second port that is not operational. The method generates a path failure message specifying that the second port is not operational and including a header that uses the egress ports and ingress ports in the data message. The method sends the path failure message out of the first port for delivery to the source of the data message.
    Type: Application
    Filed: April 9, 2018
    Publication date: June 13, 2019
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule
  • Publication number: 20190182367
    Abstract: Some embodiments provide a method for a particular forwarding element (FE) in a network of FEs. The method receives a packet at the particular FE. The packet includes a packet header that includes, for each of multiple FEs along a path from a source of the packet to a destination of the packet, (i) an identifier for the FE and (ii) a set of one or more actions for the FE to perform on the packet. The method parses the packet header to identify the set of actions for the particular FE. The method performs the identified set of actions.
    Type: Application
    Filed: April 9, 2018
    Publication date: June 13, 2019
    Inventors: Changhoon Kim, Jeongkeun Lee, Milad Sharif, Robert Soule