Patents by Inventor Milan Paunovic
Milan Paunovic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080237053Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.Type: ApplicationFiled: May 27, 2008Publication date: October 2, 2008Applicant: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Sandra G. Malhotra, Milan Paunovic, Craig Ransom
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Publication number: 20050269708Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.Type: ApplicationFiled: July 5, 2005Publication date: December 8, 2005Inventors: Panayotis Andricacos, Steven Boettcher, Fenton McFeely, Milan Paunovic
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Patent number: 6911229Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.Type: GrantFiled: August 9, 2002Date of Patent: June 28, 2005Assignee: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Publication number: 20050006777Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.Type: ApplicationFiled: August 6, 2004Publication date: January 13, 2005Applicant: International Business Machines CorporationInventors: Panayotis Andricacos, Steven Boettcher, Fenton McFeely, Milan Paunovic
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Publication number: 20040108136Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; wherein the opening has an underlayer of cobalt and/or nickel therein, barrier layer of an alloy of cobalt and/or nickel; and tungsten is provided.Type: ApplicationFiled: December 4, 2002Publication date: June 10, 2004Applicant: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Sandra G. Malhotra, Milan Paunovic, Craig Ransom
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Publication number: 20040028882Abstract: An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.Type: ApplicationFiled: August 9, 2002Publication date: February 12, 2004Inventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Publication number: 20020092673Abstract: An interconnection structure is provided wherein comprises a substrate having a dielectric layer with a via opening therein; wherein the opening has a barrier layer; and electrodeposited copper.Type: ApplicationFiled: January 17, 2001Publication date: July 18, 2002Applicant: International Business Machines CorporationInventors: Panayotis C. Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Patent number: 6416812Abstract: Copper is deposited onto a barrier layer such as tungsten from an electroless copper plating bath having a pH of at least 12.89 and a deposition rate of 50 nanometers/minute or less.Type: GrantFiled: June 29, 2000Date of Patent: July 9, 2002Assignee: International Business Machines CorporationInventors: Panayotis Andricacos, Steven H. Boettcher, Fenton Read McFeely, Milan Paunovic
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Patent number: 6395164Abstract: An electroless touch-up process for repairing copper metallization deposited in dual damascene structures with high aspect ratios. An initial copper strike layer is produced by directional deposition techniques such that discontinuous sidewall coverage occurs. An evolutionary electroless touch-up process then proceeds to conformally grow the copper layer on all surfaces. The result of the evolutionary process is to produce a continuous copper strike layer that can be used with conventional electroplating techniques.Type: GrantFiled: October 7, 1999Date of Patent: May 28, 2002Assignee: International Business Machines CorporationInventors: Panayotis Andricacos, James E. Fluegel, John G. Gaudiello, Ronald D. Goldblatt, Sandra G. Malhotra, Milan Paunovic
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Patent number: 6197364Abstract: This invention provides a method and solution for the electroless deposition of Co(P) with a designed coercivity via the programmed addition of supporting electrolytes comprising such sulfur containing compounds as sulfamic acid, potassium sulfate or sodium sulfate to a solution having a source of cobalt ions, a source of citrate ions, a buffering compound to stabilize the pH of the solution, a source of hypophosphite ions and sufficient hydroxide anions to obtain a pH of between about 7 and 9. The magnetized Co(P) material is useful in, for example, rigid magnetic storage disks, hard bias layers for MR thin film heads and magnetic detector tags.Type: GrantFiled: August 9, 1999Date of Patent: March 6, 2001Assignee: International Business Machines CorporationInventors: Milan Paunovic, Christopher Jahnes
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Patent number: 5729201Abstract: An inexpensive multibit magnetic tag is described which uses an array of amorphous wires in conjunction with a magnetic bias field. The tag is interrogated by the use of a ramped field or an ac field or a combination of the two. The magnetic bias is supplied either by coating each wire with a hard magnetic material which is magnetized or by using magnetized hard magnetic wires or foil strips in proximity to the amorphous wires. Each wire switches at a different value of the external interrogation field due to the difference in the magnetic bias field acting on each wire.Type: GrantFiled: June 29, 1995Date of Patent: March 17, 1998Assignee: International Business Machines CorporationInventors: Christopher Jahnes, Richard Joseph Gambino, Milan Paunovic, Alejandro Gabriel Schrott, Robert Jacob von Gutfeld
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Patent number: 5380560Abstract: A method of selectively seeding or activating metal interconnections patterned on polyimide dielectric surfaces using an aqueous solution of palladium sulfate, palladium perchlorate, palladium trifluoromethane sulfonate, palladium nitrate or other palladium salts having poorly coordinating counter ions. This strongly selective seeding and the corresponding ability to reliably remove all traces of the seeding material from the polyimide surface eliminates shorting, bridging and reduction of breakdown voltage during electroless plating of a thin layer of nickel or cobalt.Type: GrantFiled: July 28, 1992Date of Patent: January 10, 1995Assignee: International Business Machines CorporationInventors: Suryanarayana Kaja, Shyama P. Mukherjee, Eugene J. O'Sullivan, Milan Paunovic
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Patent number: 5294486Abstract: An improved thin film barrier with three layers where an interlayer is between barrier layers on each side, the interlayer serving as an atom energy sink. The improved barrier in the diffusion of Cu through Ni into Au where the barrier layers are Ni and the interlayer is Au, making a stack of AuNiAuNiCu, reduces the Cu present in the external Au layer after prolonged annealing in the vicinity of 0.2% atomic.Type: GrantFiled: March 29, 1993Date of Patent: March 15, 1994Assignee: International Business Machines CorporationInventors: Milan Paunovic, King-Ning Tu
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Patent number: 5169680Abstract: Electroless deposition of a conducting material on an underlying conductive region is used in a fabrication of a semiconductor device. Electroless deposition provides a selective and an additive process for forming conductive layers, filling window and providing interconnections and terminals. The conducting material is selectively deposited on a catalytic underlying surface. When the underlying surface is not catalytic, an activation step is used to cause the surface to be catalytic. Where the base underlying surface is a substrate, a contact region is formed on the substrate for electroless deposition of the conducting material.Type: GrantFiled: March 11, 1992Date of Patent: December 8, 1992Assignee: Intel CorporationInventors: Chiu H. Ting, Milan Paunovic
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Patent number: 4908242Abstract: Electroless metal plating solutions are formulated and controlled to provide high quality metal deposits by establishing the intrinsic cathodic reaction rate of the solution less than 110% of the intrinsic anodic reaction rate. Methods are provided to formulate electroless copper plating solutions which can deposit copper on printed wiring boards of quality sufficient to pass a thermal stress of 10 seconds contact with molten solder at 288.degree. C. without cracking the copper deposits on the surface of the printed wiring boards or in the holes. The ratio of the anodic reaction rate to the cathodic reaction rate can be determined by electrochemical measurements, or it can be estimated by varying the concentration of the reactants and measuring the plating rates.Type: GrantFiled: April 29, 1988Date of Patent: March 13, 1990Assignee: Kollmorgen CorporationInventors: Rowan Hughes, Milan Paunovic, Rudolph J. Zeblisky
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Patent number: 4814197Abstract: Methods of analyzing and controlling an electroless plating solution are described which provide for real time control of the electroless plating solution, e.g., an electroless copper bath whose main constituents are copper sulfate, complexing agent, formaldehyde, a hydroxide and a stabilizer. All necessary constituent concentrations, particularly the reducing agent concentration, are measured in situ and may be used to analyze and/or control the composition of the bath. A control cycle of less than one minute is required and hence real time control is achieved. The in situ measurements also provide quality indicia of the copper quality factors which are likewise used to control composition of the bath. Data from the in situ measurements is fed to a computer which, in turn, controls additions to the bath to maintain a bath composition which provides good quality electrolessly formed, copper plating.Type: GrantFiled: October 31, 1986Date of Patent: March 21, 1989Assignee: Kollmorgen CorporationInventors: John Duffy, Milan Paunovic, Stephen M. Christian, John F. McCormack
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Patent number: 4303798Abstract: The heat shock resistance of plated through holes in printed circuit assemblies is significantly increased by using as the through hole plating a special multi-layered arrangement comprising at least two layers of an electrically conductive metal in combination with at least one intermediate layer of a different electrically conductive metal. In preferred embodiments, the through hole plating comprises at least two layers of a stressed metal together with at least one intermediate layer of a metal having a stress in counteraction to that of one or more of the other metal layers. These through hole platings are capable of exposure to conditions of heat shock, such as encountered during high temperature soldering, without developing cracks resulting in breaks in the conducting pathways and failures.Type: GrantFiled: April 27, 1979Date of Patent: December 1, 1981Assignee: Kollmorgen Technologies CorporationInventor: Milan Paunovic