Patents by Inventor Miles Sanner
Miles Sanner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260213714Abstract: A low noise amplifier (LNA) with configurable feedback that includes a filter circuit for improved stability is presented. The filter circuit includes an L-C tank. The filter circuit further includes aa resistor i inn parallel with the L-C tank. The filter circuit is tunable/adjustable/programmable. The filter circuit further includes a capacitor selectively arranged in parallel with the L-C tank. The filter circuit is coupled to an input of the LNA via a series resistor. The filter circuit is coupled between the input and an output of the LNA via one or more switches. The LNA includes a first stage with a common-source transistor and a common-gate transistor. The LNA further includes a wideband feedback circuit coupled between the input and output of the first stage. The LNA includes a source-follower circuit. The source follower circuit is configurable as a second stage, or a feedback circuit, coupled to the filter circuit.Type: ApplicationFiled: November 13, 2023Publication date: July 23, 2026Inventors: Emre AYRANCI, Mengsheng RUI, Miles SANNER, Anant RUNGTA
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Publication number: 20260164758Abstract: A three-dimensional integrated circuit includes a first CMOS wafer, a second CMOS wafer disposed on and electrically connected to the first CMOS wafer, one or more thick metal layers including an inductive device disposed on the second CMOS wafer opposite the first CMOS wafer, and a grounded shield positioned to isolate the inductive device from the first CMOS wafer and the second CMOS wafer.Type: ApplicationFiled: December 6, 2024Publication date: June 11, 2026Inventors: Ke Li, Miles Sanner, Emre Ayranci
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Patent number: 12640692Abstract: Split low noise amplifier (LNA) architectures providing an improved tradeoff between the noise figure (NF) and the output-to-output isolation are disclosed. The described LNAs include cascode transistors in two amplification paths and an inductive element including a pair of inductors and a common inductor. The inductance values of the inductors and the common inductor can be selected to obtain an improved tradeoff between the NF and isolation while meeting the output matching conditions.Type: GrantFiled: August 14, 2023Date of Patent: May 26, 2026Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Emre Ayranci, Miles Sanner, Anoop Sheokand, Mengsheng Rui
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Publication number: 20250392268Abstract: Circuits and methods for an amplifier (particularly LNAs) that achieve wideband output impedance matching and high gain while simultaneously rejecting out-of-band (OOB) harmonic frequencies. Some embodiments allow multiple modes of operation to allow selection of gain versus linearity characteristics. One aspect of the present invention is improvement of the linearity and sensitivity of a whole RF “front end” (RFFE) receiver chain by suppressing OOB gain within an LNA component at higher order harmonic frequencies. Another aspect of the present invention are new wideband and ultra-wideband LNA load circuits that, while achieving high frequency OOB rejection, maintain in-band high gain and wideband output impedance matching at the same time. Yet another aspect of the present invention are new ultra-wideband LNA output impedance matching circuits.Type: ApplicationFiled: August 29, 2025Publication date: December 25, 2025Inventors: Emre Ayranci, Mengsheng Rui, Miles Sanner, Steve Gao
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Patent number: 12506447Abstract: Circuits and methods for an LNA that enable selection of a first mode providing high gain with wide output impedance matching, and a second mode providing wideband output impedance matching with improved NF and linearity at moderate gain. Some embodiments allow multiple intermediate modes to enable selection of gain versus linearity and NF. One embodiment includes a matching network having an input terminal configured to be coupled to an amplified-signal terminal of an amplification core, and an output terminal, the matching network including a first inductor coupled between the input terminal and a first node; a second inductor coupled to the first node; a boosted amplification branch coupled between the input terminal and the output terminal; and a non-amplification branch coupled between the first node and the output terminal; wherein the boosted amplification branch is enabled in a first mode, and the non-amplification branch is enabled in a second mode.Type: GrantFiled: June 30, 2022Date of Patent: December 23, 2025Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Emre Ayranci, Jubaid Qayyum, Phanindra Yerramilli, Miles Sanner
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Publication number: 20250364958Abstract: Circuits and methods for a radio frequency amplifier, such as an LNA, that include a wideband coupled input impedance matching network. One embodiment includes a first inductor coupled between a first terminal and a first node, the first terminal couplable to a degeneration terminal of an amplifier core; a second inductor coupled between a second terminal and either the first node or a second node, the second terminal couplable to an input terminal of the amplifier core; a third inductor coupled between the first node and a third terminal, the third terminal couplable to a reference potential; and, in a variant embodiment, a fourth inductor coupled between the second node and a fourth terminal, the fourth terminal couplable to the reference potential; wherein the first inductor and the second inductor are mutually coupled. Some embodiments allow multiple modes to allow tradeoffs of gain versus linearity and NF characteristics.Type: ApplicationFiled: August 9, 2025Publication date: November 27, 2025Inventors: Emre Ayranci, Mengsheng Rui, Phanindra Yerramilli, Jubaid Qayyum, Vijay Katta, Miles Sanner
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Patent number: 12483194Abstract: A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.Type: GrantFiled: May 2, 2024Date of Patent: November 25, 2025Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner
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Publication number: 20250309928Abstract: Systems, circuits, and methods are presented for providing RF switching circuits with improved performance, such as increased isolation among signal paths. According to some aspects, an RF switching circuit is disclosed. In some embodiments, the RF switching circuit includes a first switchable signal path; a second switchable signal path; and a shunt circuit connected between the first switchable signal path and the second switchable signal path, wherein the shunt circuit comprises a shunt switch; and an inductor connected in series with the shunt switch.Type: ApplicationFiled: March 26, 2024Publication date: October 2, 2025Inventors: Miles Sanner, Yaojun Shirley Prevost, Ethan Prevost, Vijay Katta, Emre Ayranci
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Patent number: 12424986Abstract: Circuits and methods for an amplifier (particularly LNAs) that achieve wideband output impedance matching and high gain while simultaneously rejecting out-of-band (OOB) harmonic frequencies. Some embodiments allow multiple modes of operation to allow selection of gain versus linearity characteristics. One aspect of the present invention is improvement of the linearity and sensitivity of a whole RF “front end” (RFFE) receiver chain by suppressing OOB gain within an LNA component at higher order harmonic frequencies. Another aspect of the present invention are new wideband and ultra-wideband LNA load circuits that, while achieving high frequency OOB rejection, maintain in-band high gain and wideband output impedance matching at the same time. Yet another aspect of the present invention are new ultra-wideband LNA output impedance matching circuits.Type: GrantFiled: June 30, 2022Date of Patent: September 23, 2025Assignee: Murata Manufacturing Co., Ltd.Inventors: Emre Ayranci, Mengsheng Rui, Miles Sanner, Steve Gao
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Patent number: 12418266Abstract: Circuits and methods for a radio frequency amplifier, such as an LNA, that include a wideband coupled input impedance matching network. One embodiment includes a first inductor coupled between a first terminal and a first node, the first terminal couplable to a degeneration terminal of an amplifier core; a second inductor coupled between a second terminal and either the first node or a second node, the second terminal couplable to an input terminal of the amplifier core; a third inductor coupled between the first node and a third terminal, the third terminal couplable to a reference potential; and, in a variant embodiment, a fourth inductor coupled between the second node and a fourth terminal, the fourth terminal couplable to the reference potential; wherein the first inductor and the second inductor are mutually coupled. Some embodiments allow multiple modes to allow tradeoffs of gain versus linearity and NF characteristics.Type: GrantFiled: June 30, 2022Date of Patent: September 16, 2025Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Emre Ayranci, Mengsheng Rui, Phanindra Yerramilli, Jubaid Qayyum, Vijay Katta, Miles Sanner
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Patent number: 12368417Abstract: A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.Type: GrantFiled: March 20, 2023Date of Patent: July 22, 2025Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner
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Publication number: 20250150052Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: ApplicationFiled: January 11, 2025Publication date: May 8, 2025Inventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Publication number: 20250132737Abstract: Methods and devices for realizing RF processing paths associated to different frequency bands are presented. According to one aspect, the RF processing paths are provided by a hybrid input LNA RF frontend that includes RF processing paths that are dedicated to specific frequency bands and RF processing paths that are shared between several frequency bands. Sharing of the RF processing paths is provided by an input combiner network and/or a multi-input cascode amplifier that includes a cascode transistor that is coupled to at least two input transistors. Further presented in a toolkit that includes circuit blocks that can be used in specific combinations to customize the RF processing paths to achieve specific performance or cost optimization. A decision tree based on performance and cost priorities assigned to each of the frequency bands is used to provide the specific combinations.Type: ApplicationFiled: November 27, 2024Publication date: April 24, 2025Inventors: Emre AYRANCI, Miles SANNER
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Publication number: 20250080070Abstract: A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.Type: ApplicationFiled: November 20, 2024Publication date: March 6, 2025Inventors: Emre Ayranci, Miles Sanner, Phanindra Yerramilli
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Publication number: 20250070810Abstract: Methods and devices addressing design of wideband LNAs with gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. The described methods and devices also address carrier aggregation requirements and provide solutions that can be used both in single-mode and split-mode operations.Type: ApplicationFiled: November 8, 2024Publication date: February 27, 2025Inventors: Emre AYRANCI, Miles SANNER, Phanindra YERRAMILLI
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Patent number: 12237821Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: GrantFiled: October 23, 2023Date of Patent: February 25, 2025Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Patent number: 12218637Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration.Type: GrantFiled: December 8, 2023Date of Patent: February 4, 2025Assignee: pSemi CorporationInventors: Kashish Pal, Emre Ayranci, Miles Sanner
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Patent number: 12212291Abstract: A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the gm of the input stage of the amplifier, thus improving the noise figure of the amplifier.Type: GrantFiled: July 13, 2023Date of Patent: January 28, 2025Assignee: pSemi CorporationInventors: Miles Sanner, Emre Ayranci
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Patent number: 12191819Abstract: Methods and devices for realizing RF processing paths associated to different frequency bands are presented. According to one aspect, the RF processing paths are provided by a hybrid input LNA RF frontend that includes RF processing paths that are dedicated to specific frequency bands and RF processing paths that are shared between several frequency bands. Sharing of the RF processing paths is provided by an input combiner network and/or a multi-input cascode amplifier that includes a cascode transistor that is coupled to at least two input transistors. Further presented in a toolkit that includes circuit blocks that can be used in specific combinations to customize the RF processing paths to achieve specific performance or cost optimization. A decision tree based on performance and cost priorities assigned to each of the frequency bands is used to provide the specific combinations.Type: GrantFiled: November 10, 2021Date of Patent: January 7, 2025Assignee: Murata Manufacturing Co., Ltd.Inventors: Emre Ayranci, Miles Sanner
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Patent number: 12184248Abstract: A receiver topology for supporting various combinations of interband carrier aggregation (CA) signals, intraband non-contiguous CA and non-CA signals having different combinations of signals aggregated therein.Type: GrantFiled: May 10, 2022Date of Patent: December 31, 2024Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Phanindra Yerramilli