Patents by Inventor Milind GUPTA

Milind GUPTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12573944
    Abstract: A method of operating a PFC circuit. The method includes receiving an input voltage at an input terminal, controlling a current in an inductor via a first switch having a drain terminal, a source terminal and a gate terminal, where the inductor is coupled between the input terminal and the drain terminal and where during an on-time of the first switch the current in the inductor increases from substantially zero to a peak, during a first off-time of the first switch the current in the inductor decreases from the peak to substantially zero, and during a second off-time of the first switch the current in the inductor is substantially zero, generating a first reference voltage that is inversely proportional to a sum of the on-time and the first off-time of the first switch, and controlling the on-time of the first switch in response to the first reference voltage.
    Type: Grant
    Filed: February 8, 2024
    Date of Patent: March 10, 2026
    Assignee: Navitas Semiconductor Limited
    Inventor: Milind Gupta
  • Publication number: 20250350196
    Abstract: An electronic component. The electronic component includes a base; a first semiconductor device attached to the base and having: a first Gallium nitride (GaN)-based switch having a first gate, a first source and a first drain, the first gate arranged to control a current flow between the first source and the first drain; a second GaN-based switch having a second source, a second gate and a second drain, the second gate coupled to the first gate, and the second drain coupled to the first drain. In one aspect, the electronic component also includes a second semiconductor device attached to the base and having: a logic circuit coupled to the second source and arranged to detect a magnitude of the current flow; and a driver circuit coupled to the first and second gates, the driver circuit arranged to control on and off states of the first and second GaN-based switches.
    Type: Application
    Filed: April 21, 2025
    Publication date: November 13, 2025
    Applicant: Navitas Semiconductor Limited
    Inventors: Chien-Chun HUANG, Milind GUPTA, Kai-Fang WEI, Xiucheng HUANG, Weijing DU, Renxiong ZHAN, Chih-Hsien HSIEH, Mingjie LI, Chi-Chih CHANG, Tao LIU, Songming ZHOU, Zhengdong ZHANG
  • Publication number: 20250260312
    Abstract: A method of operating a PFC circuit. The method includes receiving an input voltage at an input terminal, controlling a current in an inductor via a first switch having a drain terminal, a source terminal and a gate terminal, where the inductor is coupled between the input terminal and the drain terminal and where during an on-time of the first switch the current in the inductor increases from substantially zero to a peak, during a first off-time of the first switch the current in the inductor decreases from the peak to substantially zero, and during a second off-time of the first switch the current in the inductor is substantially zero, generating a first reference voltage that is inversely proportional to a sum of the on-time and the first off-time of the first switch, and controlling the on-time of the first switch in response to the first reference voltage.
    Type: Application
    Filed: February 8, 2024
    Publication date: August 14, 2025
    Applicant: Navitas Semiconductor Limited
    Inventor: Milind Gupta
  • Publication number: 20250192670
    Abstract: An electronic component. The electronic component includes a base; a first semiconductor device attached to the base and having: a first Gallium nitride (GaN)-based switch having a first gate, a first source and a first drain, the first gate arranged to control a current flow between the first source and the first drain; a second GaN-based switch having a second source, a second gate and a second drain, the second gate coupled to the first gate, and the second drain coupled to the first drain. In one aspect, the electronic component also includes a second semiconductor device attached to the base and having: a logic circuit coupled to the second source and arranged to detect a magnitude of the current flow; and a driver circuit coupled to the first and second gates, the driver circuit arranged to control on and off states of the first and second GaN-based switches.
    Type: Application
    Filed: December 10, 2024
    Publication date: June 12, 2025
    Applicant: Navitas Semiconductor Limited
    Inventors: Chien-Chun HUANG, Milind GUPTA, Kai-Fang WEI, Xiucheng HUANG, Weijing DU, Renxiong ZHAN, Chih-Hsien HSIEH, Mingjie LI, Chi-Chih CHANG, Tao LIU, Songming ZHOU, Zhengdong ZHANG
  • Patent number: 12166489
    Abstract: Aspects of this disclosure relate to a discrete time analog multiplier and a discrete time analog divider. The multiplier and divider circuits are mainly using linear components such as capacitors, current sources, comparators and transconductance amplifiers, etc. The dynamic range is only limited by the available range of supply to the circuit rather than dependent on the transistor's linearity. Such limitation could be overcome by proper scaling or autoscaling of the signals. Hence, the limited dynamic range can be easily improved. With the help of using basic electronic components and operating in the analog domain, the conversion from analog to digital and/or digital to analog is not required.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: December 10, 2024
    Assignee: Navitas Semiconductor Limited
    Inventor: Milind Gupta
  • Publication number: 20240204761
    Abstract: Aspects of this disclosure relate to a discrete time analog multiplier and a discrete time analog divider. The multiplier and divider circuits are mainly using linear components such as capacitors, current sources, comparators and transconductance amplifiers, etc. The dynamic range is only limited by the available range of supply to the circuit rather than dependent on the transistor's linearity. Such limitation could be overcome by proper scaling or autoscaling of the signals. Hence, the limited dynamic range can be easily improved. With the help of using basic electronic components and operating in the analog domain, the conversion from analog to digital and/or digital to analog is not required.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 20, 2024
    Inventor: Milind GUPTA
  • Publication number: 20240136918
    Abstract: A power factor correction circuit for a boost converter comprises a voltage converting means and a voltage-to-time converting means. The voltage converting means converts a supply voltage based on a time period of a turn-on duration Ton and a turn-off duration Toff of the boost converter into an output voltage. The voltage-to-time converting means generates the turn-on duration Ton based on the output voltage from the voltage converting means. The power factor correction circuit adjusts the turn-on duration Ton substantially in accordance with the following relationship: T on = T T on + T off ? first ? parameter second ? parameter The first parameter includes at least one first process-dependent parameter and the second parameter includes at least one second process-dependent parameter.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 25, 2024
    Inventors: Milind GUPTA, Chih-Hsien HSIEH, Jun LI