Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: A switching mode voltage regulator circuit that operates at reduced quiescent current levels is provided. The voltage regulator preferably includes a control circuit and a switching element that connects and disconnects filter circuitry from the control circuit. An error amplifier in the control circuit is placed in a micropower operating state when the regulator is in standby mode to reduce quiescent current.

Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: A switching mode voltage regulator circuit that operates at reduced quiescent current levels is provided. The voltage regulator preferably includes a control circuit and a switching element that connects and disconnects filter circuitry from the control circuit. An error amplifier in the control circuit is placed in a micropower operating state when the regulator is in standby mode to reduce quiescent current.

Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: Switching regulator circuits and methods are provided in which a voltage controlled oscillator circuit (VCO) is utilized to produce signals that turn ON a switch circuit. The VCO is itself controlled by a phase detector circuit that compares the output of the VCO to an external synchronization signal and locks the VCO to the external synchronization signal. The switching regulator circuits also include a slope compensation circuit that derives a slope compensation signal from an oscillator ramp signal produced by the VCO. The slope compensation signal is used to modify turning the switch circuit OFF when the duty cycle of the switch circuit exceeds a predetermined value. An alternate embodiment of the present invention includes a signal generation circuit in place of the phase detector circuit. The signal generation circuit applies a waveform to the VCO to vary the voltage oscillator circuit frequency, which causes a reduction in the amplitude of noise generated by the switching regulator circuit.

Abstract: Synchronous switching regulator circuits with voltage-drop sensing circuitry are presented in which the current sensing element typically in series with a load is eliminated, resulting in reduced dissipative losses and less costly manufacture. Voltage drops are measured across the regulator's synchronous switching element, and, in some cases, also across the regulator's main switching element. Measured voltage drops are used to derive a current analog signal indicative of the amount of current being supplied by the regulator. The current signal is then compared with a threshold value to determine whether the regulator's duty cycle should be varied.

Abstract: Switching regulator circuits and methods are provided in which the output circuit is adaptable to maintain high efficiency over various load current levels. The regulator circuits generate one or more control signals in response to the load current and selectively route a switch driver control signal to one or more switches in the output circuit. The switches differ in their size, such that the most efficient switch can be used at a particular load current level. At low load current levels, the driver control signal is routed to output circuitry with smaller switch devices, which incur smaller driver current losses for a given frequency of operation, thereby increasing the regulator efficiency. At high load current levels, the driver control signal is routed to large switch devices, which incur greater driver current losses for a given frequency of operation, but which have a lower impedance.

Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: Circuits and methods are provided for low drop-out operation of switching regulator circuits that include a switching transistor and an output circuit adapted to supply current at a regulated voltage to a load. The circuits and methods generate a limiting signal that allows the switching transistor to remain in a continuous conductive state for a predetermined number of oscillator cycles. The predetermined number of oscillator cycles is preferably set by a counter that initiates a signal that turns the switching transistor OFF.

Abstract: A circuit and method for controlling a switching voltage regulator having (1) a switch including one or more switching transistors and (2) an output adapted to supply current at a regulated voltage to a load including an output capacitor. The circuit and method generates a control signal to turn said one or more switching transistors OFF under operating conditions when the voltage at the output is capable of being maintained substantially at the regulated voltage by the charge on the output capacitor. Such a circuit and method increases the efficiency of the regulator circuit particularly at low average current levels.

Abstract: A driver circuit and method for alternately driving first and second power transistors is provided. The driver circuit includes shoot-through reduction circuitry for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit includes a circuit to prevent transient signals from said power transistors from affecting the operation of the driver circuit.

Abstract: A driver circuit for driving top and bottom power transistors stacked between two supply terminals is provided. The driver circuit includes shoot-through reduction means for monitoring the gate-to-source voltages of the two power transistors so as to inhibit the turning-ON of each power transistor until the gate-to-source voltage of the other power transistor has fallen to a voltage level indicative of the other transistor being OFF. Additionally, the driver circuit which can utilize a bootstrap capacitor for providing enhanced voltages to drive the top power transistor, also includes a bootstrap capacitor recharge means to monitor the output voltage of the circuit so as to inhibit the turning-ON of the top power transistor until the bootstrap capacitor has had sufficient time to recharge.

Abstract: An enable circuit that integrates thermal shutdown capability. The enable circuit utilizes a temperature insensitive threshold detector network that provides a desired biasing current when the ON/OFF signal applied at its input exceeds a preselected voltage. Thermally sensitive circuitry connected between the input of the threshold detector network and ground remains off when the ON/OFF signal is equal to the preselected voltage and the temperature of the enable circuit is below a preselected maximum temperature. However, when the temperature of the enable circuit reaches the preselected maximum temperature, the thermally sensitive circuitry turns on, clamping the input signal to the threshold detector network below the preselected voltage.

Abstract: A maximum swing bipolar charge pump retains a cascode switching configuration for high breakdown. The charge pump includes a charge pump capacitor with a first plate connected to supply in the conventional manner. A first cascode-connected NPN transistor is utilized to switch the second plate of the pump capacitor to the supply. A second cascode-connected NPN transistor is utilized to switch the second plate of the pump capacitor close to ground. An additional bipolar biasing network holds the second NPN transistor out of heavy saturation when the second plate of the pump capacitor is switched close to ground, thereby preserving fast turn-off time and maximum voltage swing with the constraint of a bipolar cascode configuration.

Abstract: An adaptive gate charge circuit for switching a power FET on in response to a control signal. The adaptive gate charge circuit includes driving circuitry that responds to assertion of a control signal by providing a charging current from a charge pump reservoir capacitor to the gate of the power FET for an initial time period sufficient to switch the power FET on. After the initial time period, holding circuitry provides holding current from the charge pump to the power FET gate to compensate for charge leakage. Current limiting circuitry connected to the holding circuitry limits current drain from the charge pump after the initial time period to the holding current required to compensate for charge leakage plus a minimum additional current.

Abstract: An adaptive gate discharge circuit for discharging the gate of a power FET transistor. The adaptive gate discharge circuit includes discharge driver circuitry which responds to the control signal by discharging the power FET gate from the initial "on" potential of the power FET to below a selected potential at which the power FET is turned off. During gate discharge, but prior to the potential of the power FET gate dropping below the selected potential, adaptive bias circuitry continues to operate to provide biasing current both to the discharge driver circuitry as well as to any other circuitry it may be biasing. However, when the potential of the power FET gate drops below the selected potential, low current biasing circuitry reduces the operating voltage of the adaptive biasing circuitry thereby turning off the adaptive biasing circuitry and any other circuitry it may be biasing.

Abstract: A wide bandwidth amplifier is coupled to the differential output of a four-quadrant multiplier. The amplifier includes a differential to single-ended input stage driving the inverting input of an operational amplifier which has its noninverting input operating at a reference potential level. The amplifier output is coupled by way of a level shifting means to the circuit output terminal which is thereby referenced to ground potential. The circuit output terminal is returned through a resistor to a source of opposite polarity power supply so that the output terminal can swing above and below ground. The second supply is only connected by way of the output terminal so that it does not require an extra package pin.

Abstract: A sampled data phase detector is created using a differential amplifier that is provided with a feedback capacitor connected between the output and the inverting input. A reference potential is coupled to the noninverting input. A coupling capacitor is connected between the inverting input and a sampling switch that switches the coupling capacitor alternately between ground and a circuit input terminal. A second switch alternately shorts out the feedback capacitor at the clock rate during the time interval the input capacitor is grounded. In this state both inputs and the output are forced to the reference potential. On the other half of the clock cycle the amplifier input is coupled to sense the data signal. The result is a rectified version of the data signal appearing at the amplifier output. The d-c level of this signal is related to the amplitude and phase of the data signal. A full wave version of the circuit is also disclosed.