Patents by Inventor Milton Lourenco Barrocas

Milton Lourenco Barrocas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for using pulse signals in memory circuits
    Patent number: 9940271
    Abstract: In a memory system where multiple memory chips communicate their ready/busy status on a shared bus line, a pulse mechanism is used for the individual memory chips to indicate their ready/busy status to the controller. In one example, the controller assigns pulse durations of differing lengths to the memory dies to allow the controller to distinguish between them. Techniques for dealing with bus collisions between the pulses of different chips are also described.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: April 10, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Daniel Tuers, Abhijeet Manohar, Yoav Weinberg, Milton Lourenco Barrocas
  • PULSE MECHANISM FOR MEMORY CIRCUIT INTERRUPTION
    Publication number: 20170212849
    Abstract: In a memory system where multiple memory chips communicate their ready/busy status on a shared bus line, a pulse mechanism is used for the individual memory chips to indicate their ready/busy status to the controller. In one example, the controller assigns pulse durations of differing lengths to the memory dies to allow the controller to distinguish between them. Techniques for dealing with bus collisions between the pulses of different chips are also described.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 27, 2017
    Inventors: Daniel Tuers, Abhijeet Manohar, Yoav Weinberg, Milton Lourenco Barrocas
  • Pulse mechanism for memory circuit interruption
    Patent number: 9620182
    Abstract: In a memory system where multiple memory chips communicate their ready/busy status on a shared bus line, a pulse mechanism is used for the individual memory chips to indicate their ready/busy status to the controller. In one example, the controller assigns pulse durations of differing lengths to the memory dies to allow the controller to distinguish between them. Techniques for dealing with bus collisions between the pulses of different chips are also described.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: April 11, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Daniel Tuers, Abhijeet Manohar, Yoav Weinberg, Milton Lourenco Barrocas
  • PULSE MECHANISM FOR MEMORY CIRCUIT INTERRUPTION
    Publication number: 20150187399
    Abstract: In a memory system where multiple memory chips communicate their ready/busy status on a shared bus line, a pulse mechanism is used for the individual memory chips to indicate their ready/busy status to the controller. In one example, the controller assigns pulse durations of differing lengths to the memory dies to allow the controller to distinguish between them. Techniques for dealing with bus collisions between the pulses of different chips are also described.
    Type: Application
    Filed: December 31, 2013
    Publication date: July 2, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Daniel Tuers, Abhijeet Manohar, Yoav Weinberg, Milton Lourenco Barrocas
  • Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system
    Patent number: 7747927
    Abstract: A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: June 29, 2010
    Assignee: Sandisk Corporation
    Inventors: Daniel C. Guterman, Yoram Cedar, Charles Schroter, Milton Lourenco Barrocas, Carlos Gonzalez, Kevin M. Conley
  • Memory system for legacy hosts
    Patent number: 7739472
    Abstract: A non-volatile memory device is provided with a controller and includes method that controls memory operations and to emulate the memory and communication characteristics of a legacy memory device. In this way, the memory device is compatible with a host that was originally designed to operate the legacy memory device. In particular, the controller performs the emulation to the host taking into account differences such as multibit memory, error correction requirement, memory support of overwrites, and erasable block sizes.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: June 15, 2010
    Assignee: Sandisk Corporation
    Inventors: Daniel C. Guterman, Yoram Cedar, Charles Schroter, Milton Lourenco Barrocas, Carlos Gonzalez, Kevin M. Conley