Abstract: A display device includes a plurality of sub-pixels arranged in a first direction and in a second direction; a plurality of data lines extending in the second direction; first data connection lines in the display area, and extending in the second direction, a first data connection line of the first data connection lines being spaced in the first direction from a data line of the plurality of data lines in a sub-pixel of the plurality of sub-pixels; and second data connection lines in the display area, extending in the first direction and coupled to at least one of the first data connection lines. The sub-pixel includes a first connection electrode coupled to a first electrode of a driving transistor of the sub-pixel, and the first connection electrode does not overlap the first data connection line and is between the first data connection line and the data line.

Abstract: A drone propeller of the present invention includes a plurality of blades and a rotary shaft, wherein the blades comprise a rotation retaining unit connected to the rotary shaft side, a separation and detachment unit that is on the outer side of the blades and is to be separated when damaged, and a breakage inducing unit which connects the rotation retaining unit and the separation and detachment unit and is damaged during a collision.

Abstract: An application protection method and an application execution method using the same are provided. The application protection method generates a key needed to execute the application which is provided to a user terminal using information on the user terminal, information on the application, and a part of text; and transmits the generated key to the user terminal. Therefore, the application is executed on the device which has a legal right for the application, thereby preventing the illegal use of the application.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: A display system includes a display panel having a plurality of pixel units, each of the pixel units having first and second divided pixel parts; a first driver for applying a first gate signal to the first divided pixel part; and a second driver for applying a second gate signal to the second divided pixel part, wherein the first and second drivers are integrally formed in the display panel and apply the first and second gate signals to be at least partially time-overlapped through independent driving.

Abstract: A display apparatus includes a panel part having a plurality of gate lines, a plurality of data lines, a plurality of pixels, a data driver and a gate driver part. Each pixel of the plurality of pixels includes a first sub-pixel and a second sub-pixel. The first sub-pixel is connected to a first gate line of the plurality of gate lines and the second sub-pixel is connected to a second gate line of the plurality of gate lines. The first sub-pixel and the second sub-pixel are each commonly connected to one data line of the plurality of data lines. The gate driver part is disposed on the panel part and applies a plurality of gate signals to the plurality of gate lines. A current gate signal of the plurality of gate signals is temporally overlapped with a previous gate signal for a predetermined time interval.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: A gate driving device includes a plurality of stages, a first dummy stage connected to the plurality of stages and a second dummy stage connected to the first dummy stage. Stages of the plurality of stages are cascaded. The first dummy stage includes a first charge unit which receives a first input signal from a previous stage of the plurality of stages and is thereby charged, and a first pull-up transistor which outputs a clock signal when the first charge unit reaches a first charge level. The second dummy stage includes a second charge unit which receives a second input signal from the first dummy stage and is thereby charged, and a second pull-up transistor which outputs the clock signal when the second charge unit reaches a second charge level higher than the first charge level.

Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.

Abstract: An application protection method and an application execution method using the same are provided. The application protection method generates a key needed to execute the application which is provided to a user terminal using information on the user terminal, information on the application, and a part of text; and transmits the generated key to the user terminal. Therefore, the application is executed on the device which has a legal right for the application, thereby preventing the illegal use of the application.

Abstract: A gate driving circuit having improved driving capability and maintaining reliability even after a prolonged period of use includes a shift register having a plurality of stages cascaded to one another, each of the plurality of stages including a pull-up unit, a pull-down unit, a discharging unit, and a holding unit, wherein at least one of the discharging unit and the holding unit includes an amorphous silicon thin film transistor and a polysilicon thin film transistor connected in parallel to each other.

Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.

Abstract: A gate driving circuit that may be capable of improving driving margin and maintaining reliability even after long use, and a display device having the gate driving circuit. The gate driving circuit includes a shift register having a plurality of stages dependently connected to one another, wherein each stage includes a pull-up unit outputting a first clock signal as a gate signal in response to a signal of a first node, to which a first input signal is applied, a pull-down unit discharging the gate signal to a gate-off voltage in response to a second input signal, a discharging unit discharging the signal of the first node to the gate-off voltage in response to the second input signal, and a holding unit maintaining the signal of the first node at the gate-off voltage in response to a delay signal of the first clock signal.

Abstract: A liquid crystal display device includes a first substrate which comprises a plurality of pixels where a thin film transistor and a pixel electrode electrically connected to the thin film transistor are formed, the first substrate including a gate line and a data line which insulatingly intersect each other; and a gate driver which applies a gate driving signal to the gate line, the thin film transistor including a gate electrode which is connected to the gate line; a source electrode which is connected to the data line; and a drain electrode which is connected to the pixel electrode, and the pixels being decreased in a value of Cp/(Cp+Clc+Cst) as going toward the gate driver (where, Cp: a sum of parasitic capacity between the gate electrode and the source electrode and parasitic capacity between the gate electrode and the drain electrode, Clc: liquid crystal capacity, and Cst: storage capacity).

Abstract: In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.

Abstract: A liquid crystal display includes a first gate electrode, a storage electrode having a body and an extension, a first semiconductor formed on a gate insulating layer, a first drain electrode formed on the first semiconductor, separated from a first source electrode, and having an end portion overlapping the first gate electrode, and an expansion overlapping the body of the storage electrode and distanced from the end portion with a connection connecting the end portion and the expansion and overlapping the extension of the storage electrode, a passivation layer having a contact hole exposing the expansion of the first drain electrode, and a first field-generating electrode connected to the first drain electrode through the contact hole.

Abstract: A liquid crystal display includes a first gate electrode, a storage electrode having a body and an extension, a first semiconductor formed on a gate insulating layer, a first drain electrode formed on the first semiconductor, separated from a first source electrode, and having an end portion overlapping the first gate electrode, and an expansion overlapping the body of the storage electrode and distanced from the end portion with a connection connecting the end portion and the expansion and overlapping the extension of the storage electrode, a passivation layer having a contact hole exposing the expansion of the first drain electrode, and a first field-generating electrode connected to the first drain electrode through the contact hole.

Abstract: A liquid crystal display includes a first gate electrode, a storage electrode having a body and an extension, a first semiconductor formed on a gate insulating layer, a first drain electrode formed on the first semiconductor, separated from a first source electrode, and having an end portion overlapping the first gate electrode, and an expansion overlapping the body of the storage electrode and distanced from the end portion with a connection connecting the end portion and the expansion and overlapping the extension of the storage electrode, a passivation layer having a contact hole exposing the expansion of the first drain electrode, and a first field-generating electrode connected to the first drain electrode through the contact hole.

Abstract: In a gate driving circuit and a display apparatus, the gate driving circuit comprises a plurality of stages. At least one of the stages comprises a pull-up section responsive to a first node signal; a pull-down section responsive to a second input signal; a discharging section discharging the first node signal in response to the second input signal; a first holding section responsive to the first clock signal, maintaining the first node signal at the off-voltage; and a second holding section responsive to the second clock signal, maintaining the first node signal at the off-voltage. The second holding section has a greater transistor width-to-length ratio than the first holding section. Therefore, an abnormal gate-on signal is less likely to occur, reducing driving defects of the display apparatus.