Patents by Inventor Min Cheol Oh
Min Cheol Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11552182Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include forming a dummy channel region and an active region of a substrate, forming a bottom source/drain region on the active region, forming a gate electrode on one of opposing side surfaces of the dummy channel region, and forming first and second spacers on the opposing side surfaces of the dummy channel region, respectively. The gate electrode may include a first portion on the one of the opposing side surfaces of the dummy channel region and a second portion between the bottom source/drain region and the first spacer. The methods may also include forming a bottom source/drain contact by replacing the first portion of the gate electrode with a conductive material. The bottom source/drain contact may electrically connect the second portion of the gate electrode to the bottom source/drain region.Type: GrantFiled: August 11, 2021Date of Patent: January 10, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Chang Woo Sohn, Seung Hyun Song, Seon-Bae Kim, Min Cheol Oh, Young Chai Jung
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Publication number: 20220320335Abstract: There is provided a semiconductor device capable of improving electrical characteristics and integration density. The semiconductor device includes an active pattern protruding from a substrate, the active pattern including long sidewalls extending in a first direction and opposite to each other in a second direction, a lower epitaxial pattern on the substrate and covering a part of the active pattern, a gate electrode on the lower epitaxial pattern and extending along the long sidewalls of the active pattern, and an upper epitaxial pattern on the active pattern and connected to an upper surface of the active pattern. The active pattern includes short sidewalls connecting with the long sidewalls of the active pattern, and at least one of the short sidewalls of the active pattern has a curved surface.Type: ApplicationFiled: January 10, 2022Publication date: October 6, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Hojun CHOI, Ji Seong KIM, Min Cheol OH, Ki-Il KIM
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Publication number: 20210376126Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include forming a dummy channel region and an active region of a substrate, forming a bottom source/drain region on the active region, forming a gate electrode on one of opposing side surfaces of the dummy channel region, and forming first and second spacers on the opposing side surfaces of the dummy channel region, respectively. The gate electrode may include a first portion on the one of the opposing side surfaces of the dummy channel region and a second portion between the bottom source/drain region and the first spacer. The methods may also include forming a bottom source/drain contact by replacing the first portion of the gate electrode with a conductive material. The bottom source/drain contact may electrically connect the second portion of the gate electrode to the bottom source/drain region.Type: ApplicationFiled: August 11, 2021Publication date: December 2, 2021Inventors: Chang Woo Sohn, Seung Hyun Song, Seon-Bae Kim, Min Cheol Oh, Young Chai Jung
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Patent number: 11107906Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include forming a dummy channel region and an active region of a substrate, forming a bottom source/drain region on the active region, forming a gate electrode on one of opposing side surfaces of the dummy channel region, and forming first and second spacers on the opposing side surfaces of the dummy channel region, respectively. The gate electrode may include a first portion on the one of the opposing side surfaces of the dummy channel region and a second portion between the bottom source/drain region and the first spacer. The methods may also include forming a bottom source/drain contact by replacing the first portion of the gate electrode with a conductive material. The bottom source/drain contact may electrically connect the second portion of the gate electrode to the bottom source/drain region.Type: GrantFiled: February 24, 2020Date of Patent: August 31, 2021Inventors: Chang Woo Sohn, Seung Hyun Song, Seon-Bae Kim, Min Cheol Oh, Young Chai Jung
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Publication number: 20210111270Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include forming a dummy channel region and an active region of a substrate, forming a bottom source/drain region on the active region, forming a gate electrode on one of opposing side surfaces of the dummy channel region, and forming first and second spacers on the opposing side surfaces of the dummy channel region, respectively. The gate electrode may include a first portion on the one of the opposing side surfaces of the dummy channel region and a second portion between the bottom source/drain region and the first spacer. The methods may also include forming a bottom source/drain contact by replacing the first portion of the gate electrode with a conductive material. The bottom source/drain contact may electrically connect the second portion of the gate electrode to the bottom source/drain region.Type: ApplicationFiled: February 24, 2020Publication date: April 15, 2021Inventors: CHANG WOO SOHN, SEUNG HYUN SONG, SEON-BAE KIM, MIN CHEOL OH, YOUNG CHAI JUNG
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Patent number: 8753494Abstract: The present disclosure relates to a gas sensor including a nanopore electrode and a fluorine compound coated on the nanopore electrode, and also relates to a preparing method of the gas sensor.Type: GrantFiled: August 16, 2012Date of Patent: June 17, 2014Assignee: Ewha University—Industry Collaboration FoundationInventors: Youngmi Lee, Myung Hwa Kim, Min-Cheol Oh, Hyunkyung Do, Kyung Jang, Ji-Hyang Jang
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Patent number: 8655115Abstract: Provided is an integrated optical current sensor for measuring the magnitude of current. The integrated optical current sensor is fabricated by integrating optical elements, such as a thermo-optic phase modulator, a waveguide polarizer and an optical coupler, on a single substrate. As compared to the known current sensors using optical fibers, the integrated optical current sensor is more compact and enables measurement of current with higher reliability. Provided also is a method for producing current sensor chips in a large scale by using a process for fabricating integrated optical elements.Type: GrantFiled: May 25, 2009Date of Patent: February 18, 2014Assignees: Pusan National University Industry-University Cooperation Foundation, Jeongkwan Co., Ltd.Inventor: Min-Cheol Oh
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Publication number: 20130043129Abstract: The present disclosure relates to a gas sensor including a nanopore electrode and a fluorine compound coated on the nanopore electrode, and also relates to a preparing method of the gas sensor.Type: ApplicationFiled: August 16, 2012Publication date: February 21, 2013Applicant: EWHA UNIVERSITY-INDUSTRY COLLABORATION FOUNDATIONInventors: Youngmi LEE, Myung Hwa KIM, Min-Cheol OH, Hyunkyung DO, Kyung JANG, Ji-Hyang JANG
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Publication number: 20120121216Abstract: Provided is an integrated optical current sensor for measuring the magnitude of current. The integrated optical current sensor is fabricated by integrating optical elements, such as a thermo-optic phase modulator, a waveguide polarizer and an optical coupler, on a single substrate. As compared to the known current sensors using optical fibers, the integrated optical current sensor is more compact and enables measurement of current with higher reliability. Provided also is a method for producing current sensor chips in a large scale by using a process for fabricating integrated optical elements.Type: ApplicationFiled: May 25, 2009Publication date: May 17, 2012Applicants: Jeongkwan Co., Ltd., Pusan National University Industry-University Cooperation FoundationInventor: Min-Cheol Oh
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Patent number: 7366363Abstract: An electro-optic modulator is formed from all flexible materials, to form a flexible electro-optic modulator. The formation process uses a photoresist which selectively adheres to one material more than it adheres to another material. This allows selective liftoff, where only parts of the substrate are lifted off. For example, this allows silicon ends on the modulator, thereby facilitating pig tailing and also facilitates handling. Another aspect describes testing the bending radius.Type: GrantFiled: April 21, 2005Date of Patent: April 29, 2008Assignee: University of Southern CaliforniaInventors: William H. Steier, Hyun-Chae Song, Min-Cheol Oh, Seh-Won Ahn
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Publication number: 20050249445Abstract: An electro-optic modulator is formed from all flexible materials, to form a flexible electro-optic modulator. The formation process uses a photoresist which selectively adheres to one material more than it adheres to another material. This allows selective liftoff, where only parts of the substrate are lifted off. For example, this allows silicon ends on the modulator, thereby facilitating pig tailing and also facilitates handling. Another aspect describes testing the bending radius.Type: ApplicationFiled: April 21, 2005Publication date: November 10, 2005Inventors: William Steier, Hyun-Chae Song, Min-Cheol Oh, Seh-Won Ahn
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Patent number: 6813417Abstract: A tapered electrooptic (EO) polymer waveguide interconnection structure coupling an EO polymer waveguide and a passive polymer waveguide and a method of fabricating the same.Type: GrantFiled: February 20, 2002Date of Patent: November 2, 2004Assignee: Pacific Wave Industries, Inc.Inventors: Min-Cheol Oh, Harold R. Fetterman, William Steier, Joseph Michael
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Patent number: 6741762Abstract: An electro-optical modulator and a method for biasing a Mach-Zehnder modulator. The inventive modulator includes a layer of material at least partially transparent to electromagnetic energy. A first conductive layer is disposed on a first surface of the layer of at least partially transparent material. A second conductive layer is disposed on a second surface of the layer of at least partially transparent material. A layer of insulating material is disposed on the second conductive layer and a third conductive layer is disposed on the layer of insulating material. In the illustrative application, the modulator is a Mach-Zehnder modulator. A biasing potential is applied to the second conductive layer of the modulator and a modulating voltage is applied across the first and the third conductive layers.Type: GrantFiled: December 5, 2001Date of Patent: May 25, 2004Assignee: Pacific Wave Industries, Inc.Inventors: Jan Grinberg, Min-Cheol Oh, Harold R. Fetterman, Joseph Michael
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Publication number: 20030156794Abstract: A tapered electrooptic (EO) polymer waveguide interconnection structure coupling an EO polymer waveguide and a passive polymer waveguide and a method of fabricating the same.Type: ApplicationFiled: February 20, 2002Publication date: August 21, 2003Inventors: Min-Cheol Oh, Harold R. Fetterman, William Steier, Joseph Michael
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Publication number: 20030103709Abstract: An electro-optical modulator and a method for biasing a Mach-Zehnder modulator. The inventive modulator includes a layer of material at least partially transparent to electro-magnetic energy. A first conductive layer is disposed on a first surface of the layer of at least partially transparent material. A second conductive layer is disposed on a second surface of the layer of at least partially transparent material. A layer of insulating material is disposed on the second conductive layer and a third conductive layer is disposed on the layer of insulating material. In the illustrative application, the modulator is a Mach-Zehnder modulator. A biasing potential is applied to the second conductive layer of the modulator and a modulating voltage is applied across the first and the third conductive layers.Type: ApplicationFiled: December 5, 2001Publication date: June 5, 2003Inventors: Jan Grinberg, Min-Cheol Oh, Harold R. Fetterman, Joseph Michael
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Patent number: 6558585Abstract: Method for manufacturing an electro-optic polymer waveguide device including the step of electrode poling an electro-optic polymer material of the device in an oxygen-free environment. In a preferred embodiment, the electrode poling is performed at a temperature close to a glass transition temperature of the electro-optic polymer material.Type: GrantFiled: November 2, 2000Date of Patent: May 6, 2003Assignee: Pacific Wave Industries, Inc.Inventors: Hua Zhang, Min-Cheol Oh, William Steier, Harold R. Fetterman, Joseph Michael
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Patent number: 6303040Abstract: A method of fabricating a thermooptic tunable wavelength filter of optical communication systems using WDM is provided, which includes the steps of forming a polymer optical waveguide on a semiconductor substrate using a polymer material, forming a polymer Bragg grating on the optical waveguide using O2 RIE and polymer spin coating, and forming a thermooptic tuning electrode over the polymer optical waveguide in which the Bragg grating is integrated. This provides the thermooptical tunable wavelength filter which has very narrow wavelength band width of transmission signal, low crosstalk with optical signals adjacent thereto, stable wavelength tuning characteristic using thermooptic effect and wide tuning ranges. Furthermore, the optical devices using the polymer optical waveguide can be fabricated with low cost. Thus, they have advantages in terms of economy and marketability.Type: GrantFiled: September 3, 1999Date of Patent: October 16, 2001Assignee: Electronics and Telecommunications Research InstituteInventors: Min Cheol Oh, Myung Hyun Lee, Hyung Jong Lee, Joo Heon Ahn, Seon Gyu Han, Hae Geun Kim
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Patent number: 6067387Abstract: An electro-optic polymer waveguide device capable of decreasing a driving voltage and an optical loss is disclosed. A vertical tapered waveguide is formed between passive waveguides of input and output portions in a waveguide and an electro-optic modulating region, and an amplitude of a waveguide mode of the input and output portion waveguide is equal to that of a optical fiber, thereby minimizing a connection loss with the optical fiber.Type: GrantFiled: July 21, 1998Date of Patent: May 23, 2000Assignees: Electronics and Telecommunications Research Institute, Korea TelecomInventors: Min Cheol Oh, Wol Yon Hwang, Seon Gyu Han
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Patent number: 6011641Abstract: The present invention relates to a wavelength insensitive passive polarization converter which can rotate the direction of optic axis of waveguide by employing poled electro-optic polymer waveguides and a method for controlling the optic axis direction of the poled polymer waveguides. A passive polarization converter of present invention is equipped with poling electrodes at top and bottom of a planar waveguide consisting of three layers of electro-optic polymer, and it comprises: a polarizer in which poling-induced optic axis aligned horizontally; a polarization rotator in which the azimuth angle of the optic axis is slowly changed along the propagation direction from horizontal to vertical direction; and, an analyzer in which poling-induced optic axis aligned vertically.Type: GrantFiled: October 30, 1997Date of Patent: January 4, 2000Assignee: Korea Advanced Institute of Science and TechnologyInventors: Sang-Yung Shin, Min-Cheol Oh
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Patent number: 5966476Abstract: A spatial switch of a simple structure using a "M.times.N" optical beam steering device which operates with M "1.times.N" spatial switches using a phased optical waveguide array. The spatial switch using an optical beam steering device in accordance with the present invention is characterized in that the optical beam steering device includes an optical waveguide phase modulator array, the optical beam steering device is used as a "1.times.N" spatial switch device, and M units of the "1.times.N" spatial switch device are aligned in parallel so that a "M.times.N" spatial switching operation is performed on a plane where a far field diffraction pattern of the "1.times.N" spatial switch device is formed. The spatial switch utilizes the characteristics that if the propagation directions of the lights output from "1.times.N" switches coincide with each other, the far field diffraction patterns formed by the switches converge into the same point.Type: GrantFiled: October 10, 1997Date of Patent: October 12, 1999Assignee: Electonics and Telecommunications Research InstituteInventors: Wol Yon Hwang, Min Cheol Oh, Jang Joo Kim