Abstract: A TFT array substrate and a manufacturing method of the same are disclosed by the present disclosure. The TFT array substrate includes a base, a light shielding layer, and a low hydrogen layer. The light shielding layer includes a silicon nitride layer formed on the base, and an amorphous silicon light shielding layer formed on the silicon nitride layer. The low hydrogen layer includes a silicon oxide layer formed on the amorphous silicon light shielding layer of the light shielding layer, and a low hydrogen Poly-Si layer formed on the silicon oxide layer. The layer number of the light shielding layer is equal to that of the low hydrogen layer. The time of manufacturing the light shielding layer matched that of manufacturing the low hydrogen layer, which enhances whole capacity of the TFT array substrate dramatically, and reduces risk of the manufacturing process.

Abstract: The present application provides a thin film transistor, an active matrix organic light emitting diode assembly and a method for manufacturing the same. The thin film transistor includes: a substrate; a buffer layer on the substrate; a semiconductor layer on the buffer layer, including a source region, a drain region and a channel region; a first gate insulating layer covering the semiconductor layer; a second gate insulating layer foot on the first gate insulating layer, a width of the second gate insulating layer foot being smaller than a width of the first gate insulating layer; and a gate electrode on the second gate insulating layer foot; wherein a part of the first gate insulating layer that is on the semiconductor layer has a flat upper surface. The present application may obtain better implantation profiles of source region and drain region, thereby obtaining better uniformity in TFT performance.

Abstract: Methods for fabricating an IGZO layer and fabricating TFT are provided in the present invention. The method for fabricating TFT includes the following steps: (1) depositing an IGZO layer and forming a surface oxidizing gas protective layer on the IGZO layer; (2) coating the IGZO layer with a photoresist, and then subjecting the photoresist to an exposing and developing process to form a photoresist pattern; and (3) subjecting the IGZO layer to an etching process, and then removing the photoresist. By forming an oxidizing gas protective layer, the present methods for fabricating an IGZO layer and fabricating TFT can effectively reduce the effect of hydrogen atom on IGZO layer and avoid the change of IGZO layer from semiconductor to conductor, thereby improving the stability of the IGZO layer and thus the TFT, and reducing the negative bias of threshold voltage generated by the long-term continuous use of the device.

Abstract: A TFT array substrate and a manufacturing method of the same are disclosed by the present disclosure. The TFT array substrate includes a base, a light shielding layer, and a low hydrogen layer. The light shielding layer includes a silicon nitride layer formed on the base, and an amorphous silicon light shielding layer formed on the silicon nitride layer. The low hydrogen layer includes a silicon oxide layer formed on the amorphous silicon light shielding layer of the light shielding layer, and a low hydrogen Poly-Si layer formed on the silicon oxide layer. The layer number of the light shielding layer is equal to that of the low hydrogen layer. The time of manufacturing the light shielding layer matched that of manufacturing the low hydrogen layer, which enhances whole capacity of the TFT array substrate dramatically, and reduces risk of the manufacturing process.

Abstract: A thin film transistor includes a semiconductor layer including a source region, a drain region, a channel region, first lightly doped drain regions adjacent to the channel region and second lightly doped drain regions adjacent to the first lightly doped drain regions; wherein the second lightly doped drain regions have a doping concentration lower than that of the first lightly doped drain regions. According to the present application, the leakage current in a switching transistor may be further reduced, thereby avoiding instability and even failure in the operation of the assembly caused by overlarge leakage current.

Abstract: Methods for fabricating an IGZO layer and fabricating TFT are provided in the present invention. The method for fabricating TFT includes the following steps: (1) depositing an IGZO layer and forming a surface oxidizing gas protective layer on the IGZO layer; (2) coating the IGZO layer with a photoresist, and then subjecting the photoresist to an exposing and developing process to form a photoresist pattern; and (3) subjecting the IGZO layer to an etching process, and then removing the photoresist. By forming an oxidizing gas protective layer, the present methods for fabricating an IGZO layer and fabricating TFT can effectively reduce the effect of hydrogen atom on IGZO layer and avoid the change of IGZO layer from semiconductor to conductor, thereby improving the stability of the IGZO layer and thus the TFT, and reducing the negative bias of threshold voltage generated by the long-term continuous use of the device.

Abstract: A thin film transistor includes a semiconductor layer including a source region, a drain region, a channel region, first lightly doped drain regions adjacent to the channel region and second lightly doped drain regions adjacent to the first lightly doped drain regions; wherein the second lightly doped drain regions have a doping concentration lower than that of the first lightly doped drain regions. According to the present application, the leakage current in a switching transistor may be further reduced, thereby avoiding instability and even failure in the operation of the assembly caused by overlarge leakage current.

Abstract: The present application provides a thin film transistor, an active matrix organic light emitting diode assembly and a method for manufacturing the same. The thin film transistor includes: a substrate; a buffer layer on the substrate; a semiconductor layer on the buffer layer, including a source region, a drain region and a channel region; a first gate insulating layer covering the semiconductor layer; a second gate insulating layer foot on the first gate insulating layer, a width of the second gate insulating layer foot being smaller than a width of the first gate insulating layer; and a gate electrode on the second gate insulating layer foot; wherein a part of the first gate insulating layer that is on the semiconductor layer has a flat upper surface. The present application may obtain better implantation profiles of source region and drain region, thereby obtaining better uniformity in TFT performance.

Abstract: An active matrix organic light emitting diode assembly includes a substrate and a plurality of pixels on the substrate, each of the pixels at least includes an Organic Light Emitting Diode (OLED), a first Thin Film Transistor (TFT) and a second TFT, wherein: the second TFT is configured to drive the OLED; the first TFT is configured to drive the second TFT, the first TFT includes a buffer layer on the substrate, a semiconductor layer on the buffer layer, a gate insulating layer covering the semiconductor layer and a gate electrode on the gate insulating layer, and the semiconductor layer includes a source region and a drain region of first conductivity type and a bottom doped region of second conductivity type. The leakage current in AMOLED assembly may be suppressed, thereby avoiding instability and even failure of assembly operation caused by overlarge leakage current.

Abstract: A thin film transistor includes a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted by a number of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a number of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of a conventional thin film transistor.

Abstract: A thin film transistor includes a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted by a number of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a number of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of a conventional thin film transistor.

Abstract: A thin film transistor including a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer is provided. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted of a plurality of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a plurality of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of conventional thin film transistor.

Abstract: A thin film transistor including a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer is provided. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted of a plurality of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a plurality of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of conventional thin film transistor.

Abstract: A method for reducing the contact resistance using plasma process tries to solve the problem that the cleaning process could not remove both the residues and oxides on the etched surface effectively. A plasma treating process is performed after the cleaning process and before any following process. Herein, the plasma treating process uses the plasma(s) to physically and/or chemically react with the etched surface. For example, inert gas plasma is used to remove these residues and the oxides, and then hydrogen plasma is used to compensate the unsaturated bonds by inducing the ions bombardment of the inert gas plasma.

Abstract: A method for reducing the contact resistance. Aims at the problems that the cleaning process could not effectively remove both the residues and oxides on the etched surface, the invention perform a plasma treating process after the cleaning process and before any following process. Herein, the plasma treating process uses the plasma(s) to physically and/or chemically react with the etched surface. For example, uses an inert gas plasma to remove these residues and the oxides, and then uses a hydrogen plasma to compensate the non-saturated bonds induced by the ions bombardment of the inert gas plasma.

Abstract: A thin film transistor includes a gate, a gate insulator layer, a channel layer, a source, a drain, and an ohmic contact layer. The gate insulator layer covers the gate; the channel layer is disposed on the gate insulator layer above the gate; the source and the drain are disposed on the channel layer; the ohmic contact layer is disposed between the channel layer and the source and drain. The ohmic contact layer is constituted by a number of film layers. As mentioned above, the thin film transistor has an ohmic contact layer constituted by a number of film layers. When the thin film transistor is turned off, the current leakage thereof is lowered than that of a conventional thin film transistor.