Abstract: A variable resistance memory device includes memory cell structures on a substrate and spaced apart from each other in first and second directions, the first and second directions being parallel to a top surface of the substrate and intersecting each other, and a dummy cell structure surrounding each of the memory cell structures, as viewed in a plan view, the dummy cell structure being a single body structure extending continuously between all the memory cell structures, wherein each of the memory cell structures includes first conductive line on and intersecting second conductive lines, and memory cells between the first and second conductive lines, and wherein the dummy cell structure includes first dummy conductive lines on and intersecting second dummy conductive lines, and dummy memory cells between the first and second dummy conductive lines.

Abstract: A memory device includes a cell block including memory cells; a control logic; and a correction block in a dummy region in a core region. The correction block may include first metal lines extending in a first direction; vias extending in a second direction; and second metal lines extending in a third direction. Each of the second metal lines may have a metal center line defining a center of each of the second metal lines in the first direction. Each of the vias may have a via center line defining a center of each of the vias in the first direction. At least one metal center line and at least one via center line may be spaced apart from each other by a first gap in the first direction.

Abstract: A variable resistance memory device includes memory cell structures on a substrate and spaced apart from each other in first and second directions, the first and second directions being parallel to a top surface of the substrate and intersecting each other, and a dummy cell structure surrounding each of the memory cell structures, as viewed in a plan view, the dummy cell structure being a single body structure extending continuously between all the memory cell structures, wherein each of the memory cell structures includes first conductive line on and intersecting second conductive lines, and memory cells between the first and second conductive lines, and wherein the dummy cell structure includes first dummy conductive lines on and intersecting second dummy conductive lines, and dummy memory cells between the first and second dummy conductive lines.

Abstract: A memory device includes a cell block including memory cells; a control logic; and a correction block in a dummy region in a core region. The correction block may include first metal lines extending in a first direction; vias extending in a second direction; and second metal lines extending in a third direction. Each of the second metal lines may have a metal center line defining a center of each of the second metal lines in the first direction. Each of the vias may have a via center line defining a center of each of th vias in the first direction. At least one metal center line and at least one via center line may be spaced apart from each other by a first gap in the first direction.

Abstract: A semiconductor device including a lower layer, a plurality of first interconnection lines extending in a first direction on the lower layer, a plurality of second interconnection lines extending in a second direction intersecting the first direction between the first interconnection lines and connecting the first interconnection lines, the second direction intersecting the first direction, first insulating patterns between the second interconnection lines, and second insulating patterns penetrating the first interconnection lines may be provided. The first interconnection lines include connection regions, to each of which at least one of the second interconnection lines is connected. The second insulating patterns penetrate the connection regions.

Abstract: Disclosed herein is a linear compressor wherein a compression unit, including a cylinder and a linear motor, is supported by a frame mounted in a hermetic container. The frame is die cast using diamagnetic zinc having a high forming accuracy, thereby preventing an electromagnetic force of the linear motor from being leaked therethrough, and enabling a reduction in the number of machining times thereof after die casting.