Abstract: A shift register includes first and second stages for sequentially outputting scan pulses to drive first and second gate lines. One of the first and second stages includes a pull-up switching device connected to an enabling node of the one of the first and second stages; a first pull-down switching device connected to a first disabling node of the one of the first and second stages; a second pull-down switching device connected to a second disabling node of the one of the first and second stages; and a node controller. The node controller of the first stage controls the logic state of each of the enabling node of the first stage, the first disabling node of the first stage and the first disabling node of the second stage. The node controller of the second stage controls the logic state of each of the enabling node of the second stage, the second disabling node of the second stage and the second disabling node of the first stage.

Abstract: A white organic light emitting diode (OLED) includes an emission layer between two electrodes. The emission layer comprises two or more kinds of compounds for the host and two or more kinds of compounds for the dopant that facilitate production of a white color. Among the two or more kinds of compounds for the host, at least one is a hole transporting material and the other is an electron transporting material. The white OLED has improved stability which increases its efficiency and life.

Abstract: This invention relates to an organic light emitting diode display device that is adaptive for preventing a characteristic change of a device which drives the organic light emitting diode and for securing reliability of the device.

Abstract: An LCD device includes a plurality of gate lines formed in an LCD panel; a plurality of driving stages, each of which sequentially outputting a respective enabling scan pulse to a corresponding one of the plurality of gate lines; at least one dummy stage responsive to an enabling scan pulse from a first one of the plurality of driving stages and supplying a disabling scan pulse to a second one of the plurality of driving stages to disable outputting of the enabling scan pulse; and a dummy gate line electrically connected to the at least one dummy stage.

Abstract: An organic light emitting diode drive circuit includes an organic light emitting diode which emits light with a current, a first transistor, a second transistor and a stress compensation circuit. The first transistor supplies a data voltage to a first node in response to a scan pulse. The second transistor controls a current flowing in the organic light emitting diode by the data voltage on the first node. The stress compensation circuit discharges the first node in response to a reset pulse. The organic light emitting diode driving circuit is adaptive to compensate characteristic changes of the organic light emitting diode drive circuit.

Abstract: Disclosed herein is an LCD device having a drive area directly formed inside a non-pixel area of a substrate without an additional drive IC. The LCD device includes a first substrate having a pixel area and a non-pixel area disposed peripherally to the pixel area. The pixel area has a thin film transistor and a pixel electrode in each sub-pixel defined by gate and data lines crossing each other. A second substrate formed in opposition to the first substrate includes a color filter layer and a black matrix layer. A liquid crystal layer is formed between the first and second substrates. An opening in the black matrix layer reveals an alignment mark, which is disposed on at least one of the first substrate and the second substrate.

Abstract: A gate driver for a display device includes a plurality of shift registers to sequentially generate output signals during a frame period in response to multi-phase clocks; and a dummy clock provided to the plurality of shift registers during a vertical blank time to reduce a stress voltage in the shift registers, wherein an output of each of the shift registers is reset to a low state power supply voltage by an output signal of the next shift register.

Abstract: A shift register for use with a liquid crystal display device includes a plurality of stages. A stage of the shift register includes a first controller, a second controller and an output buffer. The first controller charges and discharges a first node. The second controller charges and discharges a second node and a third node. The output buffer outputs a first output signal in response to the state of the first node and a second output signal in response to the state of the second and third nodes. The shift register may be adaptive to avoid a malfunction caused by a gate bias stress.

Abstract: A driving unit for a liquid crystal display device is provided. The driving unit includes a first group of driving stages and a second group of driving stages. A first driving stage of the first group receives a first gate start voltage. The first group of driving stages sequentially outputs scan signals according to a first clock signal. The scan signal outputted by one driving stage of the first group is sent to a next subsequent driving stage of the first group. A first driving stage of the second group receives a second start voltage. The second group of driving stages sequentially outputs the scan signals according to a second clock signal. The scan signal outputted by one driving stage of the second group is sent to a next subsequent driving stage of the second group. The driving stages of the first group and the second group alternately output the scan signals.

Abstract: An LCD device is disclosed, to minimize the signal distortion by decreasing the instability of voltage in a—Si:H TFT of a gate driving signal output unit, which includes a signal controller for outputting first and second control signals Q and /Q; a pull-up transistor between a clock signal terminal CLK and a gate driving signal output terminal for receiving the first control signal Q, the pull-up transistor having a first gate electrode, a first source electrode and a first drain electrode, wherein the pull-up transistor has an asymmetric structure in a first area of the first source electrode overlapped with the first gate electrode and a second area of the first drain electrode overlapped with the first gate electrode; and a pull-down transistor connected between the gate driving signal output terminal and a ground voltage terminal, wherein the pull-down transistor receives the second control signal.

Abstract: A liquid crystal display panel having a built in driving circuit according to the present invention includes liquid crystal cells arranged in a matrix form in a display area of the panel and a driving circuit disposed outside the display area in a non-display area to drive the liquid crystal cells. The liquid crystal display panel also includes a plurality of LOG-type signal lines disposed at a LOG area within the non-display area to supply a plurality of signals to the driving circuit. In addition, the liquid crystal display panel includes a black matrix disposed in the non-display area excluding the LOG area so that the black matrix is absent in the LOG area.