Abstract: Disclosed is a turbo decoding apparatus and method for a communication system. A high-rate memory buffer operating at the same frequency as a turbo decoder is arranged between a memory buffer of a receiver and the turbo decoder. The decoding apparatus reads data bits stored in the memory buffer of the receiver via the high-rate memory buffer, delays the read data bits for a time required in the turbo decoder, and then applies the delayed data bits to a Soft-In Soft-Out (SISO) decoder of the turbo decoder. The memory buffer of the receiver outputs data bits at an operating frequency or clock of the turbo decoder.

Abstract: There is provided a decoder and a decoding method for decoding data modulated with a recursive systematic convolutional code (RSC) in a mobile communication system. In the decoder, a branch metric calculating circuit (BMC) calculates branch metrics (BMs) associated with a plurality of input symbols. An add-compare-select circuit (ACS) receives the BMs and previous path metrics (PMs) and generates an plurality of path selectors and LLR (Log Likelihood Ratio) data including the plurality of path selectors and reliability information at a first time instant. A maximum likelihood (ML) state searcher has a plurality of cells in an array with rows and columns, connected to one another according to an encoder trellis, cells in each row having a process time, Ds, for outputting the same value of the cells in the last column as an ML state value representing an ML path in response to the path selectors. A delay delays the LLR data received from the ACS by the time Ds.

Abstract: Disclosed is an apparatus for transmitting a sequence of information bits and sequences of parity bits to a receiver in a transmitter of an HARQ transmission system. A turbo encoder receives a sequence of L information bits, and generates the sequence of information bits and M sequences of L parity bits for the information bits, wherein M is determined depending on a transmission code rate. A redundancy selector includes the sequence of information bits in an initial data block during initial transmission, and uniformly includes non-transmitted parity bits out of parity bits provided from each sequence of the parity bits in a retransmission data block upon every receipt of a retransmission request from the receiver.

Abstract: A device for selecting an ML (Maximum Likelihood) state in a decoding device comprising a plurality of cells arranged in a matrix of rows and columns, and a plurality of select lines. In the device, each select line is connected to all cells in a corresponding row, the select lines receive associated path select signals, each cell in a column is connected to cells in an immediately preceding column so that the cell receives a plurality of state values according to a trellis structure of the decoding device, each cell in a first column receives a plurality of state values determined according to the trellis structure of an encoder, said each first column cell selects one of the received state values in response to the select signal to store the selected state value, and cells in the last column output a state value corresponding to the ML state.

Abstract: An iterative decoder with a gain controller in a mobile communication system. In the iterative decoder, a first component decoder receives a first extrinsic information signal, a first parity signal, and a systematic code signal, decodes the systematic code signal out of the received signals, and generates a primary decoded signal including a second extrinsic information component. Here, the first and second extrinsic information signals remove noise in the input signals to the first and second component decoders. A second component decoder receives the primary decoded signal from the first component decoder and a second parity signal, decodes the decoded signal out of the received signals, and generates a secondary decoded signal and the first extrinsic information signal. One or more gain controllers are connected between the first and second component decoders, for attenuating either or both the first and second extrinsic information signals.

Abstract: A device for sequentially storing input bit symbols of a given interleaver size N in a memory at an address from 1 to N and reading the stored bit symbols from the memory. The device comprises a look-up table for providing a first variable m and a second variable J satisfying the equation N=2m×J; and an address generator for generating a read address depending on the first and second variables m and J provided from the look-up table. The read address is determined by 2m(K mod J)+BRO(K/J), where K (0≦K≦(N−1)) denotes a reading sequence and BRO is a function for converting a binary value to a decimal value by bit reversing.

Abstract: A method for interleaving input data having a size other than a multiple of 2m (m>1) is disclosed. The method comprises sequentially storing input data in a memory; adding an offset value to the input data size to provide a virtual address having a size of 2m where (m>1); defining a plurality of address generation areas each having a size of 2m m where (m>1), and generating random addresses in the address generation areas; and reading the input data from the memory using the random addresses generated from the address generation areas.

Abstract: A forward error correction method for decoding coded bits transmitted over a radio channel after being generated by encoding binary bits with low density parity check matrixes.

Abstract: Disclosed is a 16-ary QAM (Quadrature Amplitude Modulation) demodulation apparatus for receiving an input signal Rk(Xk, Yk) comprised of a kth quadrature-phase component Yk and a kth in-phase component Xk, and generating soft values &Lgr;(sk,0), &Lgr;(sk,1), &Lgr;(sk,2) and &Lgr;(sk,3) for the input signal Rk(Xk, Yk) by a soft decision means. A first calculator decides a soft value &Lgr;(sk,2) of a third demodulated symbol among 4 demodulated symbols by subtracting a distance 2a between two demodulated symbols on the same axis of a mapping table from a level |Yk| of the quadrature-phase component Yk. A second calculator decides a soft value &Lgr;(sk,3) of a fourth demodulated symbol by calculating Yk+&agr;*Zk using a first variable a determined by the soft value of the third demodulated symbol and a sign bit of the quadrature-phase component Yk.

Abstract: Disclosed is an apparatus and method for supporting automatic repeat request (ARQ) in a high-speed wireless packet data communication system. A mobile station receives control information including a subpacket identifier (SP_ID) representing the sequence of a subpacket, the size of an encoder packet (EP_SIZE), and a sequence identifier (AI_SN) that is toggled each time a new encoder packet is transmitted, while receiving one of a plurality of subpackets generated by segmenting a bit stream acquired by encoding a transmission encoder packet. The mobile station determines whether it will perform a decoding process caused by initial transmission or a decoding process caused by retransmission on the received subpacket, based on the control information.

Abstract: A decoding device for decoding an input codeword bit stream using a generator polynomial represented by the product of a plurality of sub-polynomials disclosed. The decoding device comprises a plurality of serial concatenated decoders each having different generator polynomials, wherein a product of the different generator polynomials becomes said generator polynomial, the different generator polynomials are represented by the different sub-polynomials or by a product thereof, and a first-stage decoder out of the serial concatenated decoders receives said codeword bit stream. The decoders each perform soft decision, and the codeword is a linear block code.

Abstract: A puncturing device for a turbo encoder in a mobile communication system having a turbo encoder which turbo encodes input source data into a plurality of information frames and tail symbols at a given code rate is disclosed. The puncturing device comprises a frame generator for generating a transmission frame by performing puncturing and adding invalid symbols; and a controller for performing puncturing on the information frames according to the code rate, puncturing the tail symbols only when the number of punctured information frames and tail symbols exceeds a bit number according to a symbol rate, and otherwise, controlling the frame generator by reading a puncturing pattern according to the code rate and information about the number of invalid symbols.

Abstract: A P-BRO interleaver and a method for optimizing parameters according to an interleaver size for the P-BRO interleaver. The P-BRO interleaver sequentially, by columns, arranges an input data stream of size N in a matrix having 2m rows and (J−1) columns, and R rows in a Jth column, P-BRO interleaves the arranged data, and reads the interleaved data by rows.

Abstract: An iterative decoder and iterative decoding method. In the iterative decoder, a first adder has a first port for receiving information symbols and a second port. A first component decoder which is coupled to the first adder, receives first parity symbols and decodes the information symbols using first parity symbols and an output signal of the first adder. A first subtractor has a third port for receiving the output of the first component decoder, and a fourth port. An interleaver which is coupled to the output of the first subtractor, interleaves the decoded information symbols received from the first component decoder. A second component decoder receives the output of the interleaver and second parity symbols and decodes the information symbols of the interleaver output using the received signals. A deinterleaver deinterleaves the output of the second component decoder.

Abstract: A method and apparatus for determining an optimum modulation scheme for a retransmission in a communication system supporting HARQ. When two modulation schemes are available, at an initial transmission, information is modulated in the lower-order modulation scheme if a first MPR is less than a first threshold, and in the higher-ordeulation scheme if the first MPR is greater than or equal to the first threshold. Here, an MPR is determined by an EP size, the number of available Walsh codes, and the number of slots per sub-packet that are used for a transmission. To select one of the modulation schemes for a retransmission, a second MPR is calculated using an EP size, the number of available Walsh codes, and the number of slots per sub-packet that are used for the retransmission. If the first MPR is equal to or less than a second threshold greater than the first threshold, the lower-order modulation scheme is selected.

Abstract: An interleaving apparatus and method for a communication system which can be applied to determine a new interleaver size N′=2m×(j+1) and addresses of 0 to N′−1, if a given interleaver size N is larger than 2m×j and smaller than 2m×(j+1), where m represents a first parameter indicating a number of consecutive zero bits from a least significant bit (LSB) to a most significant bit (MSB), and j represents a second parameter corresponding to a decimal value other than said consecutive zero bits. The interleaving apparatus and method sequentially stores N input data bits in an interleaver memory with the new interleaver size N′ from an address 0 to an address N−1. The interleaving apparatus and method then executes a Partial Bit Reversal(PBRO)-interleaving the memory with the new interleaver size N′, and reads data from the memory by deleting addresses corresponding to addresses of N to N′−1 of the memory before interleaving.

Abstract: A 64-ary QAM (Quadrature Amplitude Modulation) demodulation apparatus and method for receiving an input signal Rk(Xk,Yk) comprised of a kth quadrature-phase signal Yk and a kth in-phase signal Xk, and generating soft decision values &Lgr;(sk,5), &Lgr;(sk,4), &Lgr;(sk,3), &Lgr;(sk,2), &Lgr;(sk,1) and &Lgr;(sk,0) for the input signal Rk(Xk, Yk) are disclosed. A first soft decision value generator receives the quadrature-phase signal Yk of the received signal Rk and a distance value 2a between six demodulated symbols on the same axis, and generates soft decision values &Lgr;(sk,5), &Lgr;(sk,4) and &Lgr;(sk,3) for sixth, fifth, and fourth demodulated symbols. A second soft decision value generator receives the in-phase signal Xk of the received signal Rk and the distance value 2a between the six demodulated symbols on the same axis, and generates soft decision values &Lgr;(sk,2), &Lgr;(sk,1) and &Lgr;(sk,0) for third, second and first demodulated symbol.

Abstract: A 2-dimensional interleaving method is disclosed. The method comprises dividing a frame of input information bits into a plurality of groups and sequentially storing the divided groups in a memory; permuting the information bits of the groups according to a given rule and shifting an information bit existing at the last position of the last group to a position preceding the last position; and selecting the groups according to a predetermined order, and selecting one of the information bits in the selected group.

Abstract: There is provided a method for encoding input information bits by a quasi-complementary turbo code (QCTC) at a predetermined code rate to generate codeword symbols and transmitting the generated codeword symbols. The method comprises selecting one pattern among predetermined patterns corresponding to at least one of the generated codeword symbols in order to transmit the generated codeword symbols by a sub-packet length determined according to a data rate; reading information corresponding to the data rate, the sub-packet length and the selected pattern from a table in which identification information indicating the data rate, the sub-packet length and the selected pattern is previously mapped to given information; and transmitting the generated codeword symbols according to the read information and the selected pattern.

Abstract: An address generator and an address generating method are described. In the address generator, a first counter counts a plurality of clock pulses, generates a first group count, which indicates one of the group addresses of an interleaver block, at each clock pulse, and generates a carry after counting a predetermined number of clock pulses. A second counter receives the carry from the first counter, counts the plurality of carries, and generates a position count indicating one of the position addresses in each group. If the group count is one of the unavailable group count values representative of unavailable groups, or the group count is one of partially unavailable group count values representative of groups having both available and unavailable position addresses and the first position count is one of unavailable position count values representative of unavailable position addresses, a controller controls the first and second counters not to output the first group count and the first position count.