Patents by Inventor Min H. Teng

Min H. Teng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11558240
    Abstract: A system that provides communication services may include two switches for redundancy. The switches may indicate that they are independent devices to upstream devices and indicate that they are the same device to a predetermined device set. If one of the switches enters an undesired state, then the switch in a standby state may modify the upstream devices to preferentially forward packets directed toward the predetermined device set to the standby switch rather than an active switch, and after transitioning the active switch to the standby state, transition the standby switch to the active state.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: January 17, 2023
    Assignee: Arista Networks, Inc.
    Inventors: Alexander S. Rose, Anshul Sadana, Hugh W. Holbrook, Min H. Teng, Fai Li
  • Publication number: 20210281470
    Abstract: A system that provides communication services may include two switches for redundancy. The switches may indicate that they are independent devices to upstream devices and indicate that they are the same device to a predetermined device set. If one of the switches enters an undesired state, then the switch in a standby state may modify the upstream devices to preferentially forward packets directed toward the predetermined device set to the standby switch rather than an active switch, and after transitioning the active switch to the standby state, transition the standby switch to the active state.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 9, 2021
    Inventors: Alexander S. Rose, Anshul Sadana, Hugh W. Holbrook, Min H. Teng, Fai Li
  • Patent number: 10965555
    Abstract: A method and system of accelerating monitoring of network traffic. The method may include receiving, at a network chip of a network device, a network traffic data unit; capturing, by the network chip, the network traffic data unit based on a traffic sampling rate; adding, by the network chip, a sampling header to the network traffic data unit to obtain a sampled network traffic data unit; sending the sampled network traffic data unit from the network chip to a sampling engine; receiving, from the sampling engine, a flow datagram that includes a network traffic data unit portion and a flow datagram header; generating a flow network data traffic unit that includes the flow datagram; and transmitting the flow network data traffic unit towards a collector.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: March 30, 2021
    Assignee: Arista Networks, Inc.
    Inventors: Muhammad Khalid Yousuf, Kevin Martin Amiraux, Sambath Kumar Balasubramanian, Sonny N. Tran, Stefan J. Rebaud, Min H. Teng, François Labonté
  • Publication number: 20190230009
    Abstract: A method and system of accelerating monitoring of network traffic. The method may include receiving, at a network chip of a network device, a network traffic data unit; capturing, by the network chip, the network traffic data unit based on a traffic sampling rate; adding, by the network chip, a sampling header to the network traffic data unit to obtain a sampled network traffic data unit; sending the sampled network traffic data unit from the network chip to a sampling engine; receiving, from the sampling engine, a flow datagram that includes a network traffic data unit portion and a flow datagram header; generating a flow network data traffic unit that includes the flow datagram; and transmitting the flow network data traffic unit towards a collector.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 25, 2019
    Inventors: Muhammad Khalid Yousuf, Kevin Martin Amiraux, Sambath Kumar Balasubramanian, Sonny N. Tran, Stefan J. Rebaud, Min H. Teng, François Labonté
  • Patent number: 7774374
    Abstract: In some embodiments, a hardware linked-list manager includes a wildcard search controller for generating corresponding queue-specific read requests from wildcard read requests. The linked-list manager may be part of an on-chip interagent switch for allowing a plurality of agents to communicate with each other. The interagent switch may include a crossbar switch and a plurality of hardware linked-list managers integrated on the chip, connected to a random access memory, and connected to the crossbar switch such that the crossbar switch is capable of connecting each of the linked-list managers to each of the agents. Each linked-list manager sends agent-generated data to the memory for storage in the memory as a linked-list element, and retrieves linked-list elements from memory in response to agent read requests. A shared free-memory linked-list manager may maintain a linked list of free memory locations, and provide free memory address locations to a linked list manager upon request.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: August 10, 2010
    Assignee: QLogic Corporation
    Inventors: Govind Kizhepat, Min H. Teng, Kenneth Y. Y. Choy