Patents by Inventor Min-Han Chuang

Min-Han Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12027753
    Abstract: An electronic package is provided, in which a ground layer is arranged on one side of an insulator, and a first antenna portion and a second antenna portion embedded in the insulator are vertically disposed on the ground layer, where a gap is formed between the first antenna portion and the second antenna portion, such that the first antenna portion and the second antenna portion are electrically matched with each other, and the ground layer is electrically connected to the second antenna portion but free from being electrically connected to the first antenna portion.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: July 2, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chia-Chu Lai, Ho-Chuan Lin, Min-Han Chuang
  • Patent number: 12014967
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Grant
    Filed: June 27, 2023
    Date of Patent: June 18, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20240079301
    Abstract: An electronic package is provided, in which a mesh structure is disposed between a circuit structure and an electronic element to increase the shunt path of current. Therefore, when the electronic element is used as an electrode pad of a power contact, the current can be passed through a conductive sheet of the circuit structure via the mesh structure, such that the power loss can be reduced and the IR drop of the electronic element can meet the requirements.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 7, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan LIN, Chia-Chu LAI, Min-Han CHUANG
  • Publication number: 20230386992
    Abstract: An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.
    Type: Application
    Filed: August 16, 2023
    Publication date: November 30, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang
  • Publication number: 20230343665
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343663
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20230343664
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Patent number: 11776897
    Abstract: An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: October 3, 2023
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang
  • Patent number: 11728234
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: August 15, 2023
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20220359324
    Abstract: An electronic package is provided, in which an electronic component with a conductive layer on an outer surface thereof is embedded in an encapsulant, where at least one electrode pad is disposed on an active surface of the electronic component, and at least one wire electrically connected to the electrode pad is arranged inside the electronic component, so that the conductive layer is electrically connected to the wire, such that the electrode pad, the wire and the conductive layer are used as a power transmission structure which serves as a current path to reduce DC resistance and improve an impedance issue associated with the supply of power.
    Type: Application
    Filed: July 6, 2021
    Publication date: November 10, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Min-Han Chuang, Chia-Chu Lai
  • Publication number: 20220359975
    Abstract: An electronic package is provided, in which a ground layer is arranged on one side of an insulator, and a first antenna portion and a second antenna portion embedded in the insulator are vertically disposed on the ground layer, where a gap is formed between the first antenna portion and the second antenna portion, such that the first antenna portion and the second antenna portion are electrically matched with each other, and the ground layer is electrically connected to the second antenna portion but free from being electrically connected to the first antenna portion.
    Type: Application
    Filed: June 28, 2021
    Publication date: November 10, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chia-Chu Lai, Ho-Chuan Lin, Min-Han Chuang
  • Publication number: 20220359374
    Abstract: An electronic module is provided, in which a first metal layer, an insulating layer and a second metal layer are sequentially formed on side faces and a non-active face of an electronic component to serve as a capacitor structure, where the capacitor structure is exposed from an active face of the electronic component so that by directly forming the capacitor structure on the electronic component, a distance between the capacitor structure and the electronic component is minimized, such that the effect of suppressing impedance can be optimized.
    Type: Application
    Filed: September 2, 2021
    Publication date: November 10, 2022
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang
  • Publication number: 20170271251
    Abstract: A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
    Type: Application
    Filed: June 2, 2017
    Publication date: September 21, 2017
    Inventors: Bo-Shiang Fang, Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin
  • Patent number: 9698090
    Abstract: A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: July 4, 2017
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Bo-Shiang Fang, Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin
  • Patent number: 9503043
    Abstract: A duplexer is provided, which includes a first, a second and a third signal ports; a first filter and a second filter. The first filter has first, second, and third resonant circuits that have first, second and third inductors, respectively. The first, second and third inductors are mutually inductive. The first and third resonant circuits are electrically connected to the first and second signal ports, respectively. The second filter has fourth, fifth and sixth resonant circuits that have fourth, fifth and sixth inductors, respectively. The fourth resonant circuit is connected in series with the first resonant circuit. The fifth inductor and the fourth inductor are mutually inductive. The sixth resonant circuit is electrically connected to the third signal port. The second filter further has a main capacitor connected in series with the fifth and sixth resonant circuits respectively and located therebetween.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: November 22, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Min-Han Chuang, Chia-Chu Lai, Bo-Shiang Fang, Ho-Chuan Lin, Yen-Yu Chen
  • Patent number: 9281557
    Abstract: A multi bandwidth balun is provided, including a main signal port, a main inductor electrically connected to the main signal port, a first inductor inducted mutually with the main inductor to constitute a first inductor of a first conversion circuit, a first capacitor module connected in parallel to the first conversion circuit, two first signal ports electrically connected to the first capacitor module, a first main capacitor electrically connected to the first signal port and the first capacitor module therebetween, a second inductor inducted mutually with the main inductor to constitute a second inductor of a second conversion circuit, a second capacitor module connected in parallel to the second conversion circuit, two second signal ports electrically connected to the second capacitor module, and a second main capacitor electrically connected to the second signal port and the second capacitor module therebetween.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 8, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chia-Chu Lai, Min-Han Chuang, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Patent number: 9196941
    Abstract: A cross-coupled bandpass filter includes first, second, third and fourth resonators such that magnetic couplings are generated between the first and second resonators, between the third and fourth resonators and between the first and fourth resonators, a capacitive coupling is generated between the second and third resonators, and the magnetic coupling between the first and fourth resonators has a polarity opposite to that of the capacitive coupling between the second and third resonators, thereby generating two transmission zeros in a transmission rejection band.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: November 24, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Min-Han Chuang, Chia-Chu Lai, Bo-Shiang Fang, Ho-Chuan Lin, Sung-Chun Wu
  • Publication number: 20150188510
    Abstract: A circuit structure is provided, which includes: a first circuit portion having at least a capacitor; a first dielectric portion combined with the first circuit portion; a second circuit portion electrically connected to the first circuit portion and having at least an inductor; and a second dielectric portion combined with the second circuit portion, wherein the first dielectric portion has a greater dielectric constant than the second dielectric portion, thereby increasing the capacitance value and density and causing the inductor to have a high enough Q value.
    Type: Application
    Filed: March 14, 2014
    Publication date: July 2, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD
    Inventors: Ho-Chuan Lin, Chia-Chu Lai, Min-Han Chuang, Li-Fang Lin, Ming-Fan Tsai
  • Patent number: 9054670
    Abstract: A cross-coupled bandpass filter includes first, second and third resonators such that a positive mutual inductance is generated between the first and third resonators and mutual inductance generated between the first and second resonators and mutual inductance generated between the second and third resonators have the same polarity, thereby generating a transmission zero in a high frequency rejection band.
    Type: Grant
    Filed: August 17, 2012
    Date of Patent: June 9, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Min-Han Chuang, Chia-Chu Lai, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin
  • Publication number: 20140320374
    Abstract: A multi bandwidth balun is provided, including a main signal port, a main inductor electrically connected to the main signal port, a first inductor inducted mutually with the main inductor to constitute a first inductor of a first conversion circuit, a first capacitor module connected in parallel to the first conversion circuit, two first signal ports electrically connected to the first capacitor module, a first main capacitor electrically connected to the first signal port and the first capacitor module therebetween, a second inductor inducted mutually with the main inductor to constitute a second inductor of a second conversion circuit, a second capacitor module connected in parallel to the second conversion circuit, two second signal ports electrically connected to the second capacitor module, and a second main capacitor electrically connected to the second signal port and the second capacitor module therebetween.
    Type: Application
    Filed: November 26, 2013
    Publication date: October 30, 2014
    Applicant: Siliconware Precision Industries Co., Ltd
    Inventors: Chia-Chu Lai, Min-Han Chuang, Bo-Shiang Fang, Ho-Chuan Lin, Li-Fang Lin