Patents by Inventor Min-Hao Chiu

Min-Hao Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170353738
    Abstract: A coefficient access method includes: receiving a coefficient generated from an entropy decoding process, wherein the received coefficient is a part of a transform block (TB); before the received coefficient is stored into an inverse scan (IS) storage device, determining a storage position of the received coefficient according to a transpose flag associated with the TB, wherein the transpose flag indicates whether or not a coefficient transpose process is needed; and after the storage position is determined, storing the received coefficient into the determined storage position in the IS storage device.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 7, 2017
    Inventors: Min-Hao Chiu, Yung-Chang Chang
  • Publication number: 20170251218
    Abstract: A residual processing circuit has a single-path pipeline and a single-path controller. The single-path pipeline has an inverse scan (IS) circuit, an inverse quantization (IQ) circuit and an inverse transform (IT) circuit arranged to process a current non-zero residual data block in a pipeline manner. The current non-zero residual data block is at least a portion of a transform unit. The single-path controller controls pipelined processing of the current non-zero residual data block at the single-path pipeline. The single-path controller instructs the IS circuit to start IS processing of a next non-zero residual data block before the IT circuit finishes a first half of IT processing of the current non-zero residual data block.
    Type: Application
    Filed: February 22, 2017
    Publication date: August 31, 2017
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Yung-Chang Chang
  • Publication number: 20170019686
    Abstract: A partial decoding circuit with inverse second transform has a transpose buffer, a first-direction inverse residual transform circuit, and a second-direction inverse residual transform circuit. The transpose buffer stores an intermediate inverse residual transform result. The first-direction inverse residual transform circuit processes an inverse quantization output to generate the intermediate inverse residual transform result to the transpose buffer. The second-direction inverse residual transform circuit accesses the transpose buffer to retrieve the intermediate inverse residual transform result, and processes the intermediate inverse residual transform result to generate a final inverse residual transform result, where the final inverse residual transform result of the inverse second transform is further processed by an inverse transform circuit.
    Type: Application
    Filed: July 14, 2016
    Publication date: January 19, 2017
    Inventors: Min-Hao Chiu, Yu-Chuan Wang, Yung-Chang Chang
  • Publication number: 20170006299
    Abstract: A residual up-sampling apparatus has a residual up-sampling buffer and a shared residual up-sampling circuit. The residual up-sampling buffer stores an intermediate residual up-sampling result. The shared residual up-sampling circuit employs a same processing kernel to perform a first-direction residual up-sampling operation and a second-direction residual up-sampling operation. The first-direction residual up-sampling operation processes an inverse transform output of an inverse transform circuit to generate the intermediate residual up-sampling result to the residual up-sampling buffer. The second-direction residual up-sampling operation performs transpose access upon the residual up-sampling buffer to retrieve the intermediate residual up-sampling result, and processes the intermediate residual up-sampling result to generate a final residual up-sampling result.
    Type: Application
    Filed: June 29, 2016
    Publication date: January 5, 2017
    Inventors: Min-Hao Chiu, Yung-Chang Chang
  • Patent number: 9538174
    Abstract: A method and apparatus for decoding two-level scanned transform coefficients corresponding to a transform unit (TU) are disclosed. The TU is divided into sub-blocks and the transform coefficients of the TU are scanned across the sub-blocks according to a first scan pattern, and each sub-block is scanned according to a second scan pattern. In one embodiment, the sub-blocks of the transform coefficients received from the variable length decoding are stored in an inverse scan buffer (or TC buffer) and the transform coefficients are retrieved from the inverse scan buffer row-by-row or column-by-column in a selected direction after a corresponding row or column of the transform coefficients is fully received. In a system incorporating an embodiment of the present invention, at least a leading row or a leading column of the transform coefficients is available in the selected direction before a last sub-block of the transform coefficients arrives.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: January 3, 2017
    Assignee: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Yung-Chang Chang
  • Publication number: 20160241860
    Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.
    Type: Application
    Filed: April 27, 2016
    Publication date: August 18, 2016
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Chun-Chia Chen
  • Publication number: 20160227240
    Abstract: A video decoder has a first processing circuit and a second processing circuit. A shared storage device is accessible to the first processing circuit and the second processing circuit. The first processing circuit performs a first decoding operation according to data access of the shared storage device. The second processing circuit performs a second decoding operation according to data access of the shared storage device. The first decoding operation is at least a portion of a first decoding function complying with a first video coding standard, and the second decoding operation is at least a portion of a second decoding function complying with a second video coding standard different from the first video coding standard.
    Type: Application
    Filed: January 27, 2016
    Publication date: August 4, 2016
    Inventors: Min-Hao Chiu, Yung-Chang Chang
  • Patent number: 9338458
    Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.
    Type: Grant
    Filed: August 24, 2011
    Date of Patent: May 10, 2016
    Assignee: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Chun-Chia Chen
  • Publication number: 20140044165
    Abstract: A method and apparatus for decoding two-level scanned transform coefficients corresponding to a transform unit (TU) are disclosed. The TU is divided into sub-blocks and the transform coefficients of the TU are scanned across the sub-blocks according to a first scan pattern, and each sub-block is scanned according to a second scan pattern. In one embodiment, the sub-blocks of the transform coefficients received from the variable length decoding are stored in an inverse scan buffer (or TC buffer) and the transform coefficients are retrieved from the inverse scan buffer row-by-row or column-by-column in a selected direction after a corresponding row or column of the transform coefficients is fully received. In a system incorporating an embodiment of the present invention, at least a leading row or a leading column of the transform coefficients is available in the selected direction before a last sub-block of the transform coefficients arrives.
    Type: Application
    Filed: March 1, 2013
    Publication date: February 13, 2014
    Applicant: MEDIATEK INC.
    Inventors: Min-Hao Chiu, Yung-Chang Chang
  • Publication number: 20130051461
    Abstract: An exemplary video decoding apparatus includes a first decoding unit configured for decoding a first encoded block to generate first residual values, a first detecting unit configured for detecting whether all of the first residual values have a same first value, a first processing circuit configured for processing the first residual values to generate first processed residual values, and a second processing circuit configured for generating a decoded block corresponding to the first encoded block. When all of the first residual values have the same first value, the first detecting unit controls the second processing circuit to generate the decoded block without referring to the first processed residual values.
    Type: Application
    Filed: August 24, 2011
    Publication date: February 28, 2013
    Inventors: Min-Hao Chiu, Chia-Yun Cheng, Chun-Chia Chen