Patents by Inventor Min-hee Cho

Min-hee Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250007449
    Abstract: A solar power generator for forming a uniform focal region is proposed. The proposed relates to a solar power generator for forming a uniform focal region and, more particularly, to a solar power generator for forming a uniform focal region and, the solar power generator being capable of forming the uniform focal region in a specific area with an infinite number of focuses by reflected sunlight, controlling the focal region by adjusting an angle and width according to position changes of the focal region due to optical path distortion, and controlling generated power according to purpose of use.
    Type: Application
    Filed: November 16, 2021
    Publication date: January 2, 2025
    Inventors: Yong Jea JU, Hyun Il CHO, Byeong Do KANG, Min Cheol PARK, Chung Hee LEE, Raju TIMALSINA, Jin A CHOE
  • Patent number: 12168065
    Abstract: The present invention relates to a cosmetic composition for UV protection and, specifically, to a cosmetic composition for UV protection comprising: a sunscreen having a methoxycinnamate structure; and a specific weight of polar oil. The cosmetic composition for UV protection of the present invention significantly increases UV protection efficiency when exposed to UV light and has a remarkably excellent skin feel.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: December 17, 2024
    Assignee: LG HOUSEHOLD & HEALTH CARE LTD.
    Inventors: Min-Sung Choi, Kyung-Hee Song, Hyeong-Jin Cho
  • Patent number: 12164734
    Abstract: A display device including a touch sensing unit including a first touch conductive layer, a first touch insulating layer disposed on the first touch conductive layer, and a second touch conductive layer disposed on the first touch insulating layer. The touch sensor area includes a first touch sensor area located at a center of the touch sensor area, and a second touch sensor area located between the first touch sensor area and the curved portion. The first touch conductive layer includes a touch connection electrode connecting adjacent first touch electrodes, and a plurality of capacitance (cap) compensation patterns arranged in the second touch sensor area. The plurality of cap compensation patterns includes a first cap compensation pattern electrically connected to the adjacent first touch electrode and a second cap compensation pattern electrically connected to the adjacent second touch electrode.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: December 10, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sung Jin Yang, Ki Cheol Kim, Sung Hee Kim, Hyun Sik Park, Chun Gi You, Sung Ho Cho, Min Ho Chae
  • Publication number: 20240405672
    Abstract: A load driving device includes a step-up converter for raising a voltage provided by a power supply and supplying same to a load unit, by comprising a first driving unit and a second driving unit, the first driving unit comprising an inductor and a first fly capacitor, and charging energy provided by the power supply, as the inductor and the first fly capacitor are connected in parallel in a first phase, and discharging the charged energy, as the inductor and the capacitor are connected in series in a second phase, and the second driving unit comprising a second fly capacitor for charging energy provided by the power supply in the second phase and discharging the energy charged in the second phase; and a current control unit for controlling a current provided to the load unit by detecting the current flowing in the load unit and controlling the step-up converter.
    Type: Application
    Filed: December 22, 2021
    Publication date: December 5, 2024
    Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Min Kyu JE, Dong Hee CHO, Chul KIM
  • Patent number: 12159793
    Abstract: A substrate treating method including removing particles formed on a substrate by continuously performing a process of supplying a treatment liquid including a polymer and a solvent onto the substrate, forming a solidified liquid film by volatilizing the solvent in the treatment liquid, removing the solidified liquid film from the substrate by supplying a stripping liquid onto the substrate, and supplying a rinse liquid onto the substrate may be provided.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: December 3, 2024
    Assignee: SEMES CO., LTD.
    Inventors: Min Hee Cho, Kyeong Min Lee, Won Young Kang, Kang Sul Kim, Tae-Keun Kim
  • Publication number: 20240386460
    Abstract: An AI-based automatic advertisement evaluation system includes a survey setup unit configured to model a global panel advertisement pre-evaluation item list, a survey information collection unit configured to collect global panel advertisement evaluation data for a survey list provided by the survey setup unit, an advertisement evaluation analysis unit configured to analyze the global panel advertisement evaluation data collected by the survey information collection unit based on AI, and an advertisement result display unit configured to visualize data analysis results of the advertisement evaluation analysis unit.
    Type: Application
    Filed: December 20, 2022
    Publication date: November 21, 2024
    Applicant: SURVEY PEOPLE CO., LTD.
    Inventor: Min Hee CHO
  • Publication number: 20240371994
    Abstract: A semiconductor memory device with improved performance by improving interface characteristics while reducing a leakage current, and a method for fabricating the same are provided. The semiconductor memory device includes a conductive line on a substrate, a first interlayer insulating layer exposing the conductive line and defining a channel trench on the substrate, a channel layer extending along a bottom and side surface of the channel trench, a first gate electrode and a second gate electrode spaced apart from each other in the channel trench, a first gate insulating layer between the channel layer and the first gate electrode, and a second gate insulating layer between the channel layer and the second gate electrode. The channel layer includes a first oxide semiconductor layer and a second oxide semiconductor layer sequentially stacked on the conductive line. The first oxide semiconductor layer has a greater crystallinity than the second oxide semiconductor layer.
    Type: Application
    Filed: July 17, 2024
    Publication date: November 7, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Min Tae RYU, Sang Hoon UHM, Ki Seok LEE, Min Su LEE, Won Sok LEE, Min Hee CHO
  • Publication number: 20240368221
    Abstract: The present invention relates to an Impatiens balsamina-derived anti-bacterial peptide and an anti-bacterial composition comprising same. Specifically, six types of peptide derivatives were prepared on the basis of the sequence of a conventional Impatiens balsamina-derived peptide Ib-AMP4 known to have anti-fungal activity, and a peptide derivative exhibiting anti-bacterial and anti fungal activity better than that of Ib-AMP4 and having weak cytotoxicity and hemolytic properties has been identified, and thus the peptide derivative, which is an Impatiens balsamina-derived anti-bacterial peptide, can be used, in the fields of medicine, cosmetics and food, as an anti-bacterial or anti-fungal pharmaceutical composition, antibiotic, food preservative, cosmetic preservative, pharmaceutical preservative or feed additive preservative, and the like.
    Type: Application
    Filed: October 15, 2021
    Publication date: November 7, 2024
    Applicant: V&CO CO., LTD.
    Inventors: Sang Do CHA, Min Seok CHO, Won Seok CHOI, Jang Hee CHO, Ji Won YU
  • Publication number: 20240363328
    Abstract: Provided is a method and an apparatus for dry-cleaning an aluminum nitride (AlN) heater for semiconductor fabrication equipment, which may efficiently remove fluorine-containing contaminants generated on the AlN heater during semiconductor fabrication processes, and especially, may effectively and simultaneously remove organic, inorganic metallic, and inorganic contaminants. The method for dry-cleaning an AlN heater for semiconductor fabrication equipment includes steps of: determining a laser to be used for the AlN heater; determining laser control factors required for cleaning the AlN heater with respect to the laser to be used determined in the step of determining the laser to be used; and cleaning the AlN heater by laser irradiation based on the laser control factors determined in the step of determining the laser control factors.
    Type: Application
    Filed: April 16, 2024
    Publication date: October 31, 2024
    Applicant: WONIK QNC Corporation
    Inventors: Eun Young CHOI, Sang Hyun CHO, Seung Jin JUNG, Joo Hee JANG, So Young CHOI, Dong Ho SHIN, Jong Hwan MUN, Min Seob JUNG
  • Patent number: 12101988
    Abstract: A display device includes a display area including a corner portion, a display panel including a non-display area located around the display area, and a cover window disposed on the display panel. The display panel includes a flexible substrate, and a crack propagation prevention pattern including a first organic layer disposed on the flexible substrate and directly contacting the flexible substrate. The intersecting point of a bending line overlaps with the crack propagation prevention pattern in the a thickness direction. In addition, the display device further includes alignment marks which overlap with the bending line.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: September 24, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ju Chan Park, Min Soo Kim, Sun Ho Kim, Hyun Kim, Sun Hee Lee, Seung Hwan Cho
  • Publication number: 20240307365
    Abstract: The pharmaceutical composition according to the present invention can be usefully used for the prevention or treatment of systemic fibrosis.
    Type: Application
    Filed: July 22, 2022
    Publication date: September 19, 2024
    Inventors: Caroline Hee Lee, Da Jeong Bae, Min Jae Cho, Joon Seok Park
  • Publication number: 20240312708
    Abstract: A multilayer capacitor includes a body including a stack structure in which a plurality of dielectric layers are stacked and a plurality of internal electrodes stacked with respective dielectric layers interposed therebetween, external electrodes disposed on external surfaces of the body and connected to the internal electrodes, and an insulating layer covering a surface of the body. One of the external electrodes includes a metal layer connected to the insulating layer, and the insulating layer includes an oxide of a metal component of the metal layer.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yun Sung KANG, Min Jung CHO, Yun Hee KIM
  • Patent number: 12080791
    Abstract: A semiconductor memory device with improved performance by improving interface characteristics while reducing a leakage current, and a method for fabricating the same are provided. The semiconductor memory device includes a conductive line on a substrate, a first interlayer insulating layer exposing the conductive line and defining a channel trench on the substrate, a channel layer extending along a bottom and side surface of the channel trench, a first gate electrode and a second gate electrode spaced apart from each other in the channel trench, a first gate insulating layer between the channel layer and the first gate electrode, and a second gate insulating layer between the channel layer and the second gate electrode. The channel layer includes a first oxide semiconductor layer and a second oxide semiconductor layer sequentially stacked on the conductive line. The first oxide semiconductor layer has a greater crystallinity than the second oxide semiconductor layer.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: September 3, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Tae Ryu, Sang Hoon Uhm, Ki Seok Lee, Min Su Lee, Won Sok Lee, Min Hee Cho
  • Patent number: 12075611
    Abstract: A semiconductor memory includes a bit line extending in a first direction, first and second active patterns, which are alternately disposed in the first direction and on the bit line, and each of which includes a horizontal portion and a vertical portion, first word lines disposed on the horizontal portions of the first active patterns to cross the bit line, second word lines disposed on the horizontal portions of the second active patterns to cross the bit line, and an intermediate structure provided in a first gap region between the first and second word lines or in a second gap region between the vertical portions of the first and second active patterns. The first and second active patterns, which are adjacent to each other, may be disposed to be symmetric with respect to each other.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: August 27, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wonsok Lee, Min Tae Ryu, Woo Bin Song, Kiseok Lee, Minsu Lee, Min Hee Cho
  • Publication number: 20240279809
    Abstract: A substrate treatment apparatus includes a process chamber including a substrate treatment space and a disk on which a substrate is seated; and a showerhead provided on the process chamber, the showerhead including: a body; an inlet space in which a fluid is configured to flow through; and a plurality of spray holes provided on a lower surface of the body and configured to spray the fluid toward a substrate, where the plurality of spray holes are inclined at an angle with respect to the lower surface of the body.
    Type: Application
    Filed: May 1, 2024
    Publication date: August 22, 2024
    Applicant: HANWHA PRECISION MACHINERY CO., LTD.
    Inventors: Dong Won SEO, Sang Yeop KIM, Hui Seong RYU, Baek Ju LEE, Hyun Chul CHO, Min Ho CHEON, Pil Hee HAN
  • Publication number: 20240282833
    Abstract: A semiconductor device may include a bit line on the substrate, a channel pattern on the bit line and extending in a direction perpendicular to the bit line, a word line intersecting the bit line and spaced apart from the channel pattern, a gate insulating pattern between the channel pattern and the word line, an insulating pattern on the word line, and a landing pad connected to the channel pattern. The gate insulating pattern may include a first gate insulating pattern and a second gate insulating pattern having a first dielectric constant and a second dielectric constant, respectively. The second gate insulating pattern may be between the first gate insulating pattern and the word line. The first and second dielectric constants may be different. A first width of the first gate insulating pattern may be different from a second width of the second gate insulating pattern.
    Type: Application
    Filed: August 3, 2023
    Publication date: August 22, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sanghoon UHM, Min Hee CHO, Wonsok LEE, Wooje JUNG
  • Publication number: 20240276710
    Abstract: A semiconductor device includes: a substrate; a bit line above the substrate; a channel pattern on the bit line extending in a direction perpendicular to an upper surface of the bit line; a word line intersecting the bit line and spaced apart from the channel pattern; a gate insulating pattern between the channel pattern and the word line; an insulating pattern on the word line; and a landing pad connected to the channel pattern. The channel pattern includes first, second, and third channel patterns that are sequentially stacked, the first channel pattern is connected to the bit line, the second channel pattern is between the first channel pattern and the third channel pattern, the third channel pattern is connected to the landing pad, the first channel pattern and the third channel pattern include a crystalline oxide semiconductor material, and the second channel pattern includes an amorphous oxide semiconductor material.
    Type: Application
    Filed: August 1, 2023
    Publication date: August 15, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sanghoon UHM, Min Hee CHO
  • Patent number: 12048141
    Abstract: A semiconductor memory device including: a stack structure including a plurality of layers that are vertically stacked on a substrate, each of the plurality of layers including a word line, a channel layer, and a data storage element electrically connected to the channel layer; and a bit line that vertically extends on one side of the stack structure, wherein the word line includes: a first conductive line that extends in a first direction; and a gate electrode that protrudes in a second direction from the first conductive line, the second direction intersecting the first direction, wherein the channel layer is on the gate electrode, and wherein the bit line includes a connection part electrically connected to the channel layer.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: July 23, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kiseok Lee, Hui-Jung Kim, Min Hee Cho
  • Publication number: 20240238278
    Abstract: The present disclosure relates to a pharmaceutical composition that can be usefully used for the prevention or treatment of fibrosis. According to the present invention, there is a feature that the preventive or therapeutic effect of fibrosis can be further enhanced by using the first component and the second component in combination.
    Type: Application
    Filed: May 2, 2022
    Publication date: July 18, 2024
    Inventors: Da Jeong Bae, Caroline Hee Lee, Min Jae Cho, Min Young Park, Ji Hyeon Kim, Joon Seok Park
  • Publication number: 20240244831
    Abstract: A semiconductor device includes a bit line extending in a first direction on a substrate. A first insulating pattern is disposed on the bit line. A channel pattern is disposed on an upper side of the bit line and a lateral side of the first insulating pattern. The channel pattern includes an oxide semiconductor material. A gate insulating pattern is disposed on the channel pattern. Word lines are disposed on the gate insulating pattern. A second insulating pattern is disposed on the word lines. A landing pad is disposed on the channel pattern. An interlayer insulating layer disposed between the bit line and the channel pattern.
    Type: Application
    Filed: August 29, 2023
    Publication date: July 18, 2024
    Inventors: Younggeun SONG, Sanghoon UHM, Yongjin LEE, Min Hee CHO