Abstract: An electrostatic discharge protection device includes: a semiconductor substrate; an N-type doped well on the substrate, the N-type doped well including a first N+ region and a first P+ region; a P-type doped well on the substrate, the P-type doped well including a second N+ region, a third N+ region, and a second P+ region between the second N+ region and the third N+ region; and a first contact positioned above a surface of the N-type doped well between the first N+ region and the first P+ region.

Abstract: An electrostatic discharge protection device includes: a semiconductor substrate; an N-type doped well on the substrate, the N-type doped well including a first N+ region and a first P+ region; a P-type doped well on the substrate, the P-type doped well including a second N+ region, a third N+ region, and a second P+ region between the second N+ region and the third N+ region; and a first contact positioned above a surface of the N-type doped well between the first N+ region and the first P+ region.

Abstract: An electrical static discharge (ESD) protection device and a method for ESD are provided. The ESD protection device includes first and second wells and fourth through sixth doped regions. The first and second wells are located in a substrate. The first well has first through third doped regions, so as to form a first transistor. The second well is located aside the first well. The fourth through sixth doped regions are located in the second well. The fourth doped region is contacted with the third doped region. A conductive type of the fourth doped region is the same with a conductive type of the third doped region. The fifth doped region, the second well and the substrate forms a second transistor, of which a conductive type is complementary to a conductive type of the first transistor. The fifth doped region is located between the fourth and sixth doped regions.