Patents by Inventor Min-Hsiu Chen

Min-Hsiu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069299
    Abstract: An optical element driving mechanism includes a movable assembly, a fixed assembly, and a driving assembly. The movable assembly is configured to be connected to an optical element. The movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly in a range of motion. The optical element driving mechanism further includes a positioning assembly configured to position the movable assembly at a predetermined position relative to the fixed assembly when the driving assembly is not operating.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Chao-Chang HU, Kuen-Wang TSAI, Liang-Ting HO, Chao-Hsi WANG, Chih-Wei WENG, He-Ling CHANG, Che-Wei CHANG, Sheng-Zong CHEN, Ko-Lun CHAO, Min-Hsiu TSAI, Shu-Shan CHEN, Jungsuck RYOO, Mao-Kuo HSU, Guan-Yu SU
  • Patent number: 6265270
    Abstract: A method is provided to fabricate a mask ROM device via a medium current implanter. For fabricating the mask ROM device, first, formation of an array of MOS transistors on a semiconductor substrate is achieved. Each of the MOS transistors includes a gate oxide film, a gate electrode, a source region and a drain region. After the formation of the array of transistors, a USG layer, a BPSG layer, metal electrodes and a passivation layer are sequentially formed. After an order from client, an etching back process is performed to remove selected portions of the passivation layer to form openings in accordance with a ROM code. The selected portions are located over the selected gate electrodes respectively. The portions of the BPSG layer within the openings are successively etched until the remained BPSG layer is in a predetermined thickness. Finally, ROM code ions are implanted into the substrate via a medium current implanter through the openings.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: July 24, 2001
    Assignee: Winbond Electronics Corp.
    Inventors: Chen-Jui Lee, Min-Hsiu Chen
  • Patent number: 6184095
    Abstract: A method is provided to fabricate a mask ROM device via a medium current implanter. For fabricating the mask ROM device, first, formation of an array of MOS transistors on a semiconductor substrate is achieved. Each of the MOS transistors includes a gate oxide film, a gate electrode, a source region and a drain region. After the formation of the array of transistors, a USG layer, a BPSG layer, metal electrodes and a passivation layer are sequentially formed. After an order from client, an etching back process is performed to remove selected portions of the passivation layer to form openings in accordance with a ROM code. The selected portions are located over the selected gate electrodes respectively. The portions of the BPSG layer within the openings are successively etched until the remained BPSG layer is in a predetermined thickness. Finally, ROM code ions are implanted into the substrate via a medium current implanter through the openings.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: February 6, 2001
    Assignee: Windbond Electronics Corp.
    Inventors: Chen-Jui Lee, Min-Hsiu Chen