Patents by Inventor Min-Hua Tsai
Min-Hua Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240332086Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.Type: ApplicationFiled: June 10, 2024Publication date: October 3, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
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Publication number: 20240332087Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.Type: ApplicationFiled: June 10, 2024Publication date: October 3, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
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Patent number: 12040234Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.Type: GrantFiled: August 3, 2021Date of Patent: July 16, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
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Patent number: 12016250Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.Type: GrantFiled: April 20, 2022Date of Patent: June 18, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Da-Jun Lin, Min-Hua Tsai, Tai-Cheng Hou, Fu-Yu Tsai, Bin-Siang Tsai
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Patent number: 11605777Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile stress pieces.Type: GrantFiled: August 31, 2020Date of Patent: March 14, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Da-Jun Lin, Min-Hua Tsai, Tai-Cheng Hou, Fu-Yu Tsai, Bin-Siang Tsai
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Publication number: 20230005795Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.Type: ApplicationFiled: August 3, 2021Publication date: January 5, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
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Publication number: 20220246839Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.Type: ApplicationFiled: April 20, 2022Publication date: August 4, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Da-Jun Lin, Min-Hua Tsai, Tai-Cheng Hou, Fu-Yu Tsai, Bin-Siang Tsai
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Publication number: 20220045266Abstract: An MRAM structure includes a dielectric layer. A first MRAM, a second MRAM and a third MRAM are disposed on the dielectric layer, wherein the second MRAM is disposed between the first MRAM and the third MRAM, and the second MRAM includes an MTJ. Two gaps are respectively disposed between the first MRAM and the second MRAM and between the second MRAM and the third MRAM. Two tensile stress pieces are respectively disposed in each of the two gaps. A first compressive stress layer surrounds and contacts the sidewall of the MTJ entirely. A second compressive stress layer covers the openings of each of the gaps and contacts the two tensile material pieces.Type: ApplicationFiled: August 31, 2020Publication date: February 10, 2022Inventors: Da-Jun Lin, Min-Hua Tsai, Tai-Cheng Hou, Fu-Yu Tsai, Bin-Siang Tsai
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Patent number: 9669525Abstract: A palm wrench includes a C-shaped body and a driving head. The driving head is pivotably and rotatably located within the body. The body has an opening, and the driving head has two function ends on two sides thereof. The driving head is pivotably connected to the body by two pivots which extend through the body and are connected to the driving head. The driving head can be rotated with respect to the body, and the user can grapes the body to rotate the driving head to output torque.Type: GrantFiled: February 11, 2015Date of Patent: June 6, 2017Inventor: Min-Hua Tsai
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Publication number: 20160229041Abstract: A palm wrench includes a C-shaped body and a driving head. The driving head is pivotably and rotatably located within the body. The body has an opening, and the driving head has two function ends on two sides thereof. The driving head is pivotably connected to the body by two pivots which extend through the body and are connected to the driving head. The driving head can be rotated with respect to the body, and the user can grapes the body to rotate the driving head to output torque.Type: ApplicationFiled: February 11, 2015Publication date: August 11, 2016Inventor: Min-Hua Tsai
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Publication number: 20050158897Abstract: A method of fabricating an image sensor device is disclosed. In the method, a substrate having a plurality of trenches therein is provided. A first anti-reflective layer is formed on the surfaces of the trenches. An insulating layer is filled in the trenches for forming a plurality of shallow trench isolation regions. At least one photo sensitive region is formed within the substrate between neighboring shallow trench isolation regions. A second anti-reflective layer is formed at least covering the photo sensitive region. Because the first anti-reflective layer is formed on the surfaces of the trenches, and the second anti-reflective layer is formed on the photo sensitive region, the sensitivity of the image sensor device is improved.Type: ApplicationFiled: January 21, 2004Publication date: July 21, 2005Inventors: Jhy-Jyi Sze, Min-Hua Tsai, Tzung-Han Tan, Hsin-Ping Wu, Chia-Huei Lin
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Publication number: 20050158907Abstract: A method of fabricating an image sensor device is disclosed. In the method, a substrate having a plurality of trenches therein is provided. A first anti-reflective layer is formed on the surfaces of the trenches. An insulating layer is filled in the trenches for forming a plurality of shallow trench isolation regions. At least one photo sensitive region is formed within the substrate between neighboring shallow trench isolation regions. A second anti-reflective layer is formed at least covering the photo sensitive region. Because the first anti-reflective layer is formed on the surfaces of the trenches, and the second anti-reflective layer is formed on the photo sensitive region, the sensitivity of the image sensor device is improved.Type: ApplicationFiled: July 15, 2004Publication date: July 21, 2005Inventors: Jhy-Jyi Sze, Min-Hua Tsai, Tzung-Han Tan, Hsin-Ping Wu, Chia-Huei Lin