Patents by Inventor Min-Huey Tsai

Min-Huey Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6480756
    Abstract: A method for monitoring the real-time production operation is disclosed. The used stage time, the used waiting time, and the theoretical remaining processing time is counted. The allowed stage time, the allowed waiting time, and the allowed slack time is also estimated. The critical stage ratio, the critical waiting ratio, and the critical slack ratio are then calculated by the following equations: critical stage ratio=allowed stage time/used stage time; critical slack ratio=allowed slack time/theoretical remaining processing time; critical waiting ratio=allowed waiting time/used waiting time. Thereafter, the status of the lot in a stage is graded according to its critical ratio of stage, slack, and waiting. Color codes are used to indicate the critical degrees. A stage critical degree report including the WIPs and the color codes is tabled to display all the statuses of the stage.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: November 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hwei-Tsu Ann Luh, Lieh-Chang Tai, Hsin-Ming Hong, Bin-Hong Lin, Min-Huey Tsai
  • Patent number: 6356797
    Abstract: A method for automatic scheduling of a production plan. The automatic scheduling system arranges different kinds of production plans and defines a first priority lot, a second priority lot and a normal lot in testing factories. The testing processes of the first priority lot is to decide the testing machine first, then exchanged with a running lot on this testing machine when a test piece is completed. For the second priority lot, after decides the testing machine, the second priority lot is exchanged with a running lot on the testing machine when the running lot is completed. For the normal lot, the procedure is to check if the testing machine is available and need to be setup, then use a setup reduce method to reduce the setup frequency if more than one machine is available and needs to be setup. The key to reduce setup method selects the testing machine which has minimum impact for the subsequent testing lot to get efficient use of the testing machine.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: March 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hsiu Hsieh, Wen-Feng Wu, Min-Huey Tsai, Yao-Tung Liu, Lieh-Chang Tai