Patents by Inventor Min-hwan Lim

Min-hwan Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961775
    Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
  • Patent number: 6680538
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided in which a lower plug electrically connected with an active region of a wafer has a recession, and a conductive layer has a projection fitted into the recession of the lower plug, so that a contact area between the lower plug and the conductive layer increases without increasing a contact resistance therebetween. Thus, the conductive layer can endure physical impacts applied in the formation of the conductive layer itself and in subsequent integration processes, without detaching from the lower plug or the wafer.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: January 20, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Bong Kim, Joo-Young Kim, Min-hwan Lim
  • Patent number: 6645849
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided in which a lower plug electrically connected with an active region of a wafer has a recession, and a conductive layer has a projection fitted into the recession of the lower plug, so that a contact area between the lower plug and the conductive layer increases without increasing a contact resistance therebetween. Thus, the conductive layer can endure physical impacts applied in the formation of the conductive layer itself and in subsequent integration processes, without detaching from the lower plug or the wafer.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: November 11, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Bong Kim, Joo-Young Kim, Min-hwan Lim
  • Publication number: 20020089061
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided in which a lower plug electrically connected with an active region of a wafer has a recession, and a conductive layer has a projection fitted into the recession of the lower plug, so that a contact area between the lower plug and the conductive layer increases without increasing a contact resistance therebetween. Thus, the conductive layer can endure physical impacts applied in the formation of the conductive layer itself and in subsequent integration processes, without detaching from the lower plug or the wafer.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 11, 2002
    Inventors: Sung-Bong Kim, Joo-Young Kim, Min-Hwan Lim
  • Publication number: 20020041030
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device are provided in which a lower plug electrically connected with an active region of a wafer has a recession, and a conductive layer has a projection fitted into the recession of the lower plug, so that a contact area between the lower plug and the conductive layer increases without increasing a contact resistance therebetween. Thus, the conductive layer can endure physical impacts applied in the formation of the conductive layer itself and in subsequent integration processes, without detaching from the lower plug or the wafer.
    Type: Application
    Filed: February 22, 2001
    Publication date: April 11, 2002
    Applicant: Samsung Electronics Co., LTD.
    Inventors: Sung-Bong Kim, Joo-Young Kim, Min-hwan Lim