Patents by Inventor Min Jae HUR

Min Jae HUR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20230389321
    Abstract: A semiconductor memory device includes a stack structure and a slit structure. The stack structure includes insulation layers and conductive layers alternately stacked with the insulation layers. The slit structure is configured to divide the stack structure into memory blocks. A part of the slit structure configured to define one memory block has a dashed shape including a slit region and a bridge region.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Applicant: SK hynix Inc.
    Inventors: Min Jae HUR, Ji Hyeun SHIN, Ju Hun KIM, Bo Ram PARK, Ji Woong SUE
  • Three-dimensional semiconductor memory device including slit structures
    Patent number: 11744068
    Abstract: A semiconductor memory device includes a stack structure and a slit structure. The stack structure includes insulation layers and conductive layers alternately stacked with the insulation layers. The slit structure is configured to divide the stack structure into memory blocks. A part of the slit structure configured to define one memory block has a dashed shape including a slit region and a bridge region.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: August 29, 2023
    Assignee: SK hynix Inc.
    Inventors: Min Jae Hur, Ji Hyeun Shin, Ju Hun Kim, Bo Ram Park, Ji Woong Sue
  • THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20210366925
    Abstract: A semiconductor memory device includes a stack structure and a slit structure. The stack structure includes insulation layers and conductive layers alternately stacked with the insulation layers. The slit structure is configured to divide the stack structure into memory blocks. A part of the slit structure configured to define one memory block has a dashed shape including a slit region and a bridge region.
    Type: Application
    Filed: September 16, 2020
    Publication date: November 25, 2021
    Applicant: SK hynix Inc.
    Inventors: Min Jae HUR, Ji Hyeun SHIN, Ju Hun KIM, Bo Ram PARK, Ji Woong SUE