Patents by Inventor Min-Jong Yoo

Min-Jong Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12272126
    Abstract: A reinforcement learning-based sensor data management system includes a processor configured to: manage virtualized objects that correspond to sensors included in a sensor network to update data received from each sensor and queries representing a data quality requested by an application; calculate an abstracted action that abstracts a size of an action space of the sensor network based on present state information of the virtualized objects and the queries; calculate scores for virtualized objects based on position relationships between the calculated abstracted action the virtualized objects; and assign priorities to the virtualized objects based on the calculated scores to update data received from the sensors to the virtualized objects according to the priorities.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: April 8, 2025
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Hong Uk Woo, Seung Hwan Jeong, Gwang Pyo Yoo, Min Jong Yoo, Ik Jun Yeom
  • Publication number: 20240185134
    Abstract: A reinforcement learning model is provided. The reinforcement learning model may include a skill regularized task decomposition model configured to perform a skill regularized task decomposition based on a determined data quality and a data augmentation model configured to perform data augmentation by generating an imaginary demo. The skill regularized task decomposition model may perform a skill embedding operation by implementing 2n-step state-action pairs, perform a skill regularization operation by implementing n-step transitions including states, actions, rewards, and next states, and perform an operation of decomposing a task in units of episodes into subtasks in units of n-steps.
    Type: Application
    Filed: October 17, 2023
    Publication date: June 6, 2024
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Hong Uk WOO, Min Jong YOO, Sang Woo CHO
  • Publication number: 20230177348
    Abstract: According to an exemplary embodiment of the present invention, a reinforcement learning method using a task decomposition inference model in a time-variant environment includes selecting a plurality of paired transitions having a time-invariant common characteristic and a time-variant different environmental characteristic from a dataset including a plurality of transition data, based on a cycle generative adversarial network (GAN), training an auto encoder to embed each of the time-variant part and the time-invariant part with respect to the plurality of paired transitions into a latent space, and performing reinforcement learning on a transition corresponding to data collected in the time-variant environment, using the trained auto encoder.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Min Jong YOO, Gwang Pyo YOO, Hong Uk WOO
  • Publication number: 20210201084
    Abstract: A reinforcement learning-based sensor data management system includes a processor configured to: manage virtualized objects that correspond to sensors included in a sensor network to update data received from each sensor and queries representing a data quality requested by an application; calculate an abstracted action that abstracts a size of an action space of the sensor network based on present state information of the virtualized objects and the queries; calculate scores for virtualized objects based on position relationships between the calculated abstracted action the virtualized objects; and assign priorities to the virtualized objects based on the calculated scores to update data received from the sensors to the virtualized objects according to the priorities.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 1, 2021
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Hong Uk WOO, Seung Hwan JEONG, Gwang Pyo YOO, Min Jong YOO, Ik Jun YEOM
  • Patent number: 8030979
    Abstract: A reference voltage generating circuit includes a reference voltage generating unit generating a uniform reference voltage in response to a bias voltage, a bias voltage generating unit generating the bias voltage, and a start-up circuit, after activating the bias voltage generating unit by receiving a first supply voltage, canceling a change of the first supply voltage to maintain a separation from the bias voltage generating unit. The circuit adopts a start-up circuit having a voltage distributing unit, thereby preventing a quiescent point of a bias voltage generating unit from entering a zero state and prevents a reference voltage from rising in a power-up state that an analog supply voltage rises according to a change of an external design environment such as a power, a temperature, a process parameter and the like, thereby generating a reference voltage more stably. As a result, current consumption and power consumption are minimized.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: October 4, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Min-Jong Yoo
  • Publication number: 20100164609
    Abstract: A reference voltage generating circuit includes a reference voltage generating unit generating a uniform reference voltage in response to a bias voltage, a bias voltage generating unit generating the bias voltage, and a start-up circuit, after activating the bias voltage generating unit by receiving a first supply voltage, canceling a change of the first supply voltage to maintain a separation from the bias voltage generating unit. The circuit adopts a start-up circuit having a voltage distributing unit, thereby preventing a quiescent point of a bias voltage generating unit from entering a zero state and prevents a reference voltage from rising in a power-up state that an analog supply voltage rises according to a change of an external design environment such as a power, a temperature, a process parameter and the like, thereby generating a reference voltage more stably. As a result, current consumption and power consumption are minimized.
    Type: Application
    Filed: December 16, 2009
    Publication date: July 1, 2010
    Inventor: Min-Jong Yoo
  • Publication number: 20080315926
    Abstract: Disclosed is a frequency synthesizer. The frequency synthesizer includes a phase frequency detector for generating an up signal and a down signal by detecting frequency and phase differences between a reference signal and a comparison signal, a charge pump for outputting a control signal according to the up signal and the down signal, a voltage controlled oscillator for outputting an oscillation output signal according to the control signal, a duty cycle correction circuit connected with the voltage controlled oscillator to compensate for a duty cycle of the oscillation output signal, and a feedback divider for providing the comparison signal to the phase frequency detector by dividing a frequency of the oscillation output signal.
    Type: Application
    Filed: June 23, 2008
    Publication date: December 25, 2008
    Inventor: Min Jong Yoo