Patents by Inventor Min Joong Jung
Min Joong Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240130419Abstract: A flavoring sheet with improved physical properties, a smoking article including the same, and methods of producing the flavoring sheet and the smoking article are provided. The flavoring sheet according to some embodiments of the present disclosure may include a hydrocolloid material configured to form a sheet, a flavoring, and a plasticizer. The plasticizer can improve physical properties of the flavoring sheet and thus enhance workability of a process of cutting the flavoring sheet.Type: ApplicationFiled: July 10, 2022Publication date: April 25, 2024Applicant: KT&G CORPORATIONInventors: Geon Chang LEE, Ick Joong KIM, Kyung Bin JUNG, Eun Mi JEOUNG, Min Hee HWANG
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Publication number: 20240102035Abstract: The present invention relates to an artificially manipulated unsaturated fatty acid biosynthesis-associated factor and use thereof to increase the content of a specific unsaturated fatty acid of a plant body. More particularly, the present invention relates to a system capable of artificially controlling unsaturated fatty acid biosynthesis and a plant body produced thereby, which include an artificially manipulated unsaturated fatty acid biosynthesis-associated factor to control unsaturated fatty acid biosynthesis and a composition capable of artificially manipulating the factor. In a specific aspect, the present invention relates to artificially manipulated unsaturated fatty acid biosynthesis-associated factors such as FAD2, FAD3, FAD6, FAD7 and FAD8 and/or an unsaturated fatty acid biosynthesis controlling system by an expression product thereof.Type: ApplicationFiled: November 29, 2023Publication date: March 28, 2024Inventors: Seok Joong KIM, Ok Jae KOO, Min Hee JUNG, Ye Seul KIM
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Patent number: 9318198Abstract: A method of operating a memory system according to an aspect of the present disclosure includes storing first data in a memory controller; storing second data in the memory controller, wherein the second data is read from a selected page of a first memory block of a memory device; and performing a program operation for storing third data, that include the first data and the second data, in a selected page of a second memory block of the memory device.Type: GrantFiled: October 25, 2011Date of Patent: April 19, 2016Assignee: Hynix Semiconductor Inc.Inventors: Min Joong Jung, Jung Mi Shin, Wan Seob Lee
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Patent number: 8897066Abstract: A method of programming a nonvolatile memory device includes sequentially programming first to (n?1)th logical pages of all the physical pages of a first memory block of the memory blocks in response to a first program command, a step of loading data of the first to (n?1)th logical pages stored in a first physical page of the first memory block and latching the loaded data in first to (n?1)th latches of each of the page buffers, respectively, when receiving a second program command after programming all the first to (n?1)th logical pages, and latching new program data, received along with the second program command, in an nth latch of the corresponding page buffer and programming the data, stored in the first to nth latches of the page buffer, into a first physical page of a second memory block of the memory blocks.Type: GrantFiled: December 29, 2011Date of Patent: November 25, 2014Assignee: Hynix Semiconductor Inc.Inventor: Min Joong Jung
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Publication number: 20120281488Abstract: A semiconductor memory device includes a first plane and a second plane each configured to include a plurality of memory cells, and a data transfer circuit configured to transfer first data, stored in the memory cells of the first plane, to the second plane and transfer second data, stored in the memory cells of the second plane, to the first plane when a copyback operation is performed and to transfer the first data or the second data to an I/O circuit when a read operation is performed.Type: ApplicationFiled: November 1, 2011Publication date: November 8, 2012Inventors: Min Joong Jung, Wan Seob Lee, Jung Mi Shin
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Publication number: 20120163092Abstract: The program method of a nonvolatile memory device includes detecting temperature, setting a step voltage, corresponding to an increment of a program voltage in a program operation of an incremental step pulse program (ISPP) method, wherein the step voltage changes based on the detected temperature, and performing the program operation and a program verification operation based on the set step voltage.Type: ApplicationFiled: September 23, 2011Publication date: June 28, 2012Applicant: Hynix Semiconductor Inc.Inventors: Min Joong Jung, Jung Mi Shin, Seong Je Park
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Publication number: 20120151161Abstract: A method of operating a memory system according to an aspect of the present disclosure includes storing first data in a memory controller; storing second data in the memory controller, wherein the second data is read from a selected page of a first memory block of a memory device; and performing a program operation for storing third data, that include the first data and the second data, in a selected page of a second memory block of the memory device.Type: ApplicationFiled: October 25, 2011Publication date: June 14, 2012Inventors: Min Joong JUNG, Jung Mi SHIN, Wan Seob LEE
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Publication number: 20120099373Abstract: A method of programming a nonvolatile memory device includes sequentially programming first to (n?1)th logical pages of all the physical pages of a first memory block of the memory blocks in response to a first program command, a step of loading data of the first to (n?1)th logical pages stored in a first physical page of the first memory block and latching the loaded data in first to (n?1)th latches of each of the page buffers, respectively, when receiving a second program command after programming all the first to (n?1)th logical pages, and latching new program data, received along with the second program command, in an nth latch of the corresponding page buffer and programming the data, stored in the first to nth latches of the page buffer, into a first physical page of a second memory block of the memory blocks.Type: ApplicationFiled: December 29, 2011Publication date: April 26, 2012Inventor: Min Joong JUNG
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Patent number: 8107287Abstract: A method of programming a nonvolatile memory device includes sequentially programming first to (n?1)th logical pages of all the physical pages of a first memory block of the memory blocks in response to a first program command, a step of loading data of the first to (n?1)th logical pages stored in a first physical page of the first memory block and latching the loaded data in first to (n?1)th latches of each of the page buffers, respectively, when receiving a second program command after programming all the first to (n?1)th logical pages, and latching new program data, received along with the second program command, in an nth latch of the corresponding page buffer and programming the data, stored in the first to nth latches of the page buffer, into a first physical page of a second memory block of the memory blocks.Type: GrantFiled: January 28, 2010Date of Patent: January 31, 2012Assignee: Hynix Semiconductor Inc.Inventor: Min Joong Jung
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Publication number: 20100195388Abstract: A method of programming a nonvolatile memory device includes sequentially programming first to (n?1)th logical pages of all the physical pages of a first memory block of the memory blocks in response to a first program command, a step of loading data of the first to (n?1)th logical pages stored in a first physical page of the first memory block and latching the loaded data in first to (n?1)th latches of each of the page buffers, respectively, when receiving a second program command after programming all the first to (n?1)th logical pages, and latching new program data, received along with the second program command, in an nth latch of the corresponding page buffer and programming the data, stored in the first to nth latches of the page buffer, into a first physical page of a second memory block of the memory blocks.Type: ApplicationFiled: January 28, 2010Publication date: August 5, 2010Inventor: Min Joong JUNG
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Patent number: 7684254Abstract: A flash memory device comprises a memory cell array having a plurality of blocks. An address register section is configured to receive a start block address of the first block to be erased among a plurality of blocks to be erased and a last block address of the last block to be erased among the plurality of blocks to be erased. A controlling logic circuit is configured to output an erase command signal and an erase block address corresponding to one of the blocks to be erased. A block address comparing section is configured to compare the erase block address output by the controlling logic circuit with the last block address, and output an erase progress signal based on the comparison of the erase block address and the last block address to the controlling logic circuit. The controlling logic circuit outputs an erase block address of to another block to be erased until the erase progress signal indicates that the last block to be erased has been or is being erased.Type: GrantFiled: December 28, 2006Date of Patent: March 23, 2010Assignee: Hynix Semiconductor Inc.Inventors: Min Joong Jung, Byoung Kwan Jeong, Tai Kyu Kang
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Publication number: 20080084766Abstract: A flash memory device comprises a memory cell array having a plurality of blocks. An address register section is configured to receive a start block address of the first block to be erased among a plurality of blocks to be erased and a last block address of the last block to be erased among the plurality of blocks to be erased. A controlling logic circuit is configured to output an erase command signal and an erase block address corresponding to one of the blocks to be erased. A block address comparing section is configured to compare the erase block address output by the controlling logic circuit with the last block address, and output an erase progress signal based on the comparison of the erase block address and the last block address to the controlling logic circuit. The controlling logic circuit outputs an erase block address of to another block to be erased until the erase progress signal indicates that the last block to be erased has been or is being erased.Type: ApplicationFiled: December 28, 2006Publication date: April 10, 2008Applicant: Hynix Semiconductor Inc.Inventors: Min Joong Jung, Byoung Kwan Jeong, Tai Kyu Kang