Abstract: A touch detection module, includes: a plurality of driving electrodes arranged side by side; a plurality of sensing electrodes staggered with respect to the driving electrodes; and a touch driving circuit configured to supply touch driving signals to the plurality of driving electrodes and to detect touch detection signals through the plurality of sensing electrodes to identify touch position coordinates, wherein the touch driving circuit is configured: to vary frequency modulation parameter set values in response to a change in a frequency of reference clocks, and to generate and supply a frequency of the touch driving signals by using the reference clocks and a varied frequency modulation parameter set value.

Abstract: Provided is a multilayer ceramic capacitor having dielectric layers and internal electrode layers laminated alternately on one another. Each internal electrode layer comprises a common ceramic material containing 3 to 25% by weight of rare earth elements, and through the rare earth elements, high dielectric layers are formed on the interfaces between the dielectric layers and the internal electrode layers.

Abstract: Provided herein may be a memory controller, a memory system, and a method of operating the memory system. The memory controller may control the operation of a memory device. The memory controller may include a read request buffer, a command generator, and a read request monitor. The read request buffer may be configured to receive a read request from a host. The command generator may be configured to receive the read request from the read request buffer and generate a read command based on the received read request. The read request monitor may be configured to receive read request information about the read request from the read request buffer and determine, based on a stream ID of the read request, whether the read request is a sequential read request.

Abstract: Provided is a multilayer ceramic capacitor having dielectric layers and internal electrode layers laminated alternately on one another. Each internal electrode layer comprises a common ceramic material containing 3 to 25% by weight of rare earth elements, and through the rare earth elements, high dielectric layers are formed on the interfaces between the dielectric layers and the internal electrode layers.

Abstract: Provided herein may be a memory controller, a memory system, and a method of operating the memory system. The memory controller may control the operation of a memory device. The memory controller may include a read request buffer, a command generator, and a read request monitor. The read request buffer may be configured to receive a read request from a host. The command generator may be configured to receive the read request from the read request buffer and generate a read command based on the received read request. The read request monitor may be configured to receive read request information about the read request from the read request buffer and determine, based on a stream ID of the read request, whether the read request is a sequential read request.

Abstract: A data storage device includes a non-volatile memory device and a controller. The controller is configured to calculate a read range including read regions that may correspond to each of read commands for the same physical address among a plurality of read commands received from a host device. The controller may be configured to generate an integral read command for simultaneously reading the calculated read range. The controller may transmit the integral read command to the non-volatile memory device.

Abstract: Provided herein may be a storage device having improved operating speed and a method of operating the same. The storage device may include a memory controller configured to control the plurality of dies, each including two or more planes. The memory controller may include a reserved block information storage unit configured to store reserved block information that is information related to reserved blocks included in the plurality of dies; and a bad block management control unit configured to set, when a bad block occurs among memory blocks respectively included in the plurality of dies, a reserved block to replace the bad block depending on whether any one of available reserved blocks are included in a plane to which the bad block belongs, among the two or more planes included in a die including the bad block, based on the reserved block information.

Abstract: Provided herein may be a memory controller, a memory system, and a method of operating the memory system. The memory controller may control the operation of a memory device. The memory controller may include a read request buffer, a command generator, and a read request monitor. The read request buffer may be configured to receive a read request from a host. The command generator may be configured to receive the read request from the read request buffer and generate a read command based on the received read request. The read request monitor may be configured to receive read request information about the read request from the read request buffer and determine, based on a stream ID of the read request, whether the read request is a sequential read request.

Abstract: Provided herein may be a storage device having improved operating speed and a method of operating the same. The storage device may include a memory controller configured to control the plurality of dies, each including two or more planes. The memory controller may include a reserved block information storage unit configured to store reserved block information that is information related to reserved blocks included in the plurality of dies; and a bad block management control unit configured to set, when a bad block occurs among memory blocks respectively included in the plurality of dies, a reserved block to replace the bad block depending on whether any one of available reserved blocks are included in a plane to which the bad block belongs, among the two or more planes included in a die including the bad block, based on the reserved block information.

Abstract: A data storage device includes a non-volatile memory device and a controller. The controller is configured to calculate a read range including read regions that may correspond to each of read commands for the same physical address among a plurality of read commands received from a host device. The controller may be configured to generate an integral read command for simultaneously reading the calculated read range. The controller may transmit the integral read command to the non-volatile memory device.

Abstract: Provided herein may be a storage device having improved operating speed and a method of operating the same. The storage device may include a memory controller configured to control the plurality of dies, each including two or more planes. The memory controller may include a reserved block information storage unit configured to store reserved block information that is information related to reserved blocks included in the plurality of dies; and a bad block management control unit configured to set, when a bad block occurs among memory blocks respectively included in the plurality of dies, a reserved block to replace the bad block depending on whether any one of available reserved blocks are included in a plane to which the bad block belongs, among the two or more planes included in a die including the bad block, based on the reserved block information.

Abstract: A data storage device includes a non-volatile memory device and a controller. The controller is configured to calculate a read range including read regions that may correspond to each of read commands for the same physical address among a plurality of read commands received from a host device. The controller may be configured to generate an integral read command for simultaneously reading the calculated read range. The controller may transmit the integral read command to the non-volatile memory device.

Abstract: Provided herein may be a memory system and a method of operating the same. The memory system may include a memory controller, and a plurality of memory devices coupled to the memory controller through a plurality of channels. The memory controller may include a power consumption measurement unit configured to measure power consumption of a memory system at intervals of a predetermined time period and to generate a first signal based on the measured power consumption, and a performance throttling control unit configured to perform an operation of changing performance of the memory system in response to the first signal. The performance throttling control unit may be configured to perform the operation of changing the performance of the memory system a plurality of times within the predetermined time period.

Abstract: Provided herein may be a memory controller, a memory system, and a method of operating the memory system. The memory controller may control the operation of a memory device. The memory controller may include a read request buffer, a command generator, and a read request monitor. The read request buffer may be configured to receive a read request from a host. The command generator may be configured to receive the read request from the read request buffer and generate a read command based on the received read request. The read request monitor may be configured to receive read request information about the read request from the read request buffer and determine, based on a stream ID of the read request, whether the read request is a sequential read request.

Abstract: Provided herein may be a memory controller, a memory system having the memory controller, and a method of operating the memory system. The memory controller may include: a host interface configured to receive an external read command and a logical address from a host, and output read data to the host; an internal memory configured to output a physical address corresponding to the logical address; a control processor configured to convert the external read command into an internal read command, and control a read operation; and a memory interface configured to transmit the internal read address and the physical address to a memory device, and transmit read data received from the memory device to the host interface.

Abstract: A data storage device includes a non-volatile memory device and a controller. The controller is configured to calculate a read range including read regions that may correspond to each of read commands for the same physical address among a plurality of read commands received from a host device. The controller may be configured to generate an integral read command for simultaneously reading the calculated read range. The controller may transmit the integral read command to the non-volatile memory device.

Abstract: Provided herein may be a storage device having improved operating speed and a method of operating the same. The storage device may include a memory controller configured to control the plurality of dies, each including two or more planes. The memory controller may include a reserved block information storage unit configured to store reserved block information that is information related to reserved blocks included in the plurality of dies; and a bad block management control unit configured to set, when a bad block occurs among memory blocks respectively included in the plurality of dies, a reserved block to replace the bad block depending on whether any one of available reserved blocks are included in a plane to which the bad block belongs, among the two or more planes included in a die including the bad block, based on the reserved block information.

Abstract: Provided herein may be a memory system and a method of operating the same. The memory system may include a memory controller, and a plurality of memory devices coupled to the memory controller through a plurality of channels. The memory controller may include a power consumption measurement unit configured to measure power consumption of a memory system at intervals of a predetermined time period and to generate a first signal based on the measured power consumption, and a performance throttling control unit configured to perform an operation of changing performance of the memory system in response to the first signal. The performance throttling control unit may be configured to perform the operation of changing the performance of the memory system a plurality of times within the predetermined time period.

Abstract: Disclosed are a memory system, which processes data, and an operating method of the memory system. The memory system includes: a memory device, including a plurality of memory blocks in which data is stored; and a controller, configured to perform a command operation corresponding to a command received from a host and a garbage collection operation. The controller stops the ongoing garbage collection operation when a system termination command is input from the host during the garbage collection operation, and transmits a signal corresponding to the system termination command to the host.

Abstract: A data storage device includes a nonvolatile memory device including word lines each including one or more pages; and a controller suitable for, in the case where recovery is made to a normal state from a power-off state, searching a word line including an erased page among the word lines, and selecting, when all pages of the word line including the erased page are erased pages, the corresponding word line as a reliability verification word line.