Patents by Inventor Min-Keun Kwak

Min-Keun Kwak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080291652
    Abstract: Provided are a semiconductor package and a method for forming the same, and a PCB (printed circuit board). The semiconductor package comprises: a PCB including a slit at a substantially central portion thereof, the PCB including an upper surface and a lower surface; a semiconductor chip mounted on the upper surface of the PCB; an upper molding layer disposed on the upper surface and covering the semiconductor chip; and a lower molding layer filling the slit and covering a portion of the lower surface of the PCB, wherein the PCB comprises a connecting recess at a side surface thereof, and the upper molding layer and the lower molding layer are in contact with each other at the connecting recess.
    Type: Application
    Filed: May 21, 2008
    Publication date: November 27, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mu-Seob Shin, Byung-Seo Kim, Min-Young Son, Min-Keun Kwak
  • Patent number: 7414303
    Abstract: The present invention provides an LOC package wherein the lead frame is in direct contact with the semiconductor device. The lead frame, which includes openings, is positioned directly on the semiconductor device. An adhesive material is applied in the opening in the lead frame. This adhesive material contacts both the lead frame and the semiconductor device. The lead frame is therefore securely held to the semiconductor device. Wires can then be bonded to contact pads on the semiconductor device and to the lead frame.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-Hyeop Lee, Se-Yong Oh, Jin-Ho Kim, Chan-Suk Lee, Min-Keun Kwak, Sung-Hwan Yoon, Tae-Duk Nam
  • Publication number: 20070069355
    Abstract: A ball grid array (BGA) package that may suppress flash contamination may include a flash contamination barrier wall. The barrier wall may be a portion of a copper pattern provided on a substrate. During a molding process, the flash contamination barrier may prevent a flash from contaminating a ball land. The barrier wall may restrict the flash to flow through a concave portion that may be defined by a surface of the substrate.
    Type: Application
    Filed: November 30, 2006
    Publication date: March 29, 2007
    Inventors: Min-Keun Kwak, Il-Ki Kim
  • Patent number: 7166906
    Abstract: A ball grid array (BGA) package that may suppress flash contamination may include a flash contamination barrier wall. The barrier wall may be a portion of a copper pattern provided on a substrate. During a molding process, the flash contamination barrier may prevent a flash from contaminating a ball land. The barrier wall may restrict the flash to flow through a concave portion that may be defined by a surface of the substrate.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: January 23, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min-Keun Kwak, Il-Ki Kim
  • Patent number: 7064435
    Abstract: A semiconductor package has ball lands each configured to have a composite structure of SMD type and NSMD type. One peripheral portion of the ball land is covered with a mask layer, thus forming the SMD type, whereas the other peripheral portion is exposed through an opening area of the mask layer, thus forming the NSMD type. In one embodiment, the first peripheral portion is disposed to face a central point of a ball-mounting surface of a substrate, and the second peripheral portion is disposed to face the opposite direction to the central point. The composite structure of the ball lands provides more stable and enhanced connections between connection balls, such as solder balls, and the ball-mounting surface.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: June 20, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Kee Chung, Min-Keun Kwak, Kil-Soo Kim
  • Publication number: 20050260844
    Abstract: A ball grid array (BGA) package that may suppress flash contamination may include a flash contamination barrier wall. The barrier wall may be a portion of a copper pattern provided on a substrate. During a molding process, the flash contamination barrier may prevent a flash from contaminating a ball land. The barrier wall may restrict the flash to flow through a concave portion that may be defined by a surface of the substrate.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Min-Keun Kwak, Il-Ki Kim
  • Publication number: 20050212099
    Abstract: The present invention provides an LOC package wherein the lead frame is in direct contact with the semiconductor device. The lead frame, which includes openings, is positioned directly on the semiconductor device. An adhesive material is applied in the opening in the lead frame. This adhesive material contacts both the lead frame and the semiconductor device. The lead frame is therefore securely held to the semiconductor device. Wires can then be bonded to contact pads on the semiconductor device and to the lead frame.
    Type: Application
    Filed: March 11, 2005
    Publication date: September 29, 2005
    Inventors: Sang-Hyeop Lee, Se-Yong Oh, Jing-Ho Kim, Chan-Suk Lee, Min-Keun Kwak, Sung-Hwan Yoon, Tae-Duk Nam
  • Publication number: 20050023683
    Abstract: A semiconductor package has ball lands each configured to have a composite structure of SMD type and NSMD type. One peripheral portion of the ball land is covered with a mask layer, thus forming the SMD type, whereas the other peripheral portion is exposed through an opening area of the mask layer, thus forming the NSMD type. In one embodiment, the first peripheral portion is disposed to face a central point of a ball-mounting surface of a substrate, and the second peripheral portion is disposed to face the opposite direction to the central point. The composite structure of the ball lands provides more stable and enhanced connections between connection balls, such as solder balls, and the ball-mounting surface.
    Type: Application
    Filed: June 25, 2004
    Publication date: February 3, 2005
    Inventors: Myung-Kee Chung, Min-Keun Kwak, Kil-Soo Kim