Patents by Inventor Min Kuang Li

Min Kuang Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for testing for defects in a semiconductor memory array
    Patent number: 8605525
    Abstract: A system and method for testing semiconductor memory devices includes a variable voltage input to a memory cell control gate. The voltage to the control gate can be varied from a voltage level used for normal memory cell operation, such as a read operation, to a voltage level that can be used to detect a defect in the memory device. During testing, the voltage level applied to the control gate is lower than the voltage level applied to a second terminal, such as a drain terminal, of the memory cell. In some embodiments, testing for defects can include applying a negative voltage to the control gate, while a positive voltage is applied to the drain terminal, which can reveal the presence of a gate-to-drain leakage defect.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: December 10, 2013
    Assignee: Macronix International Co., Ltd.
    Inventors: Yin Chin Huang, Chu Pang Huang, Cheng Chi Liu, Min Kuang Li, Chang Chan Yang, Yi Fang Chang
  • SYSTEM AND METHOD FOR TESTING FOR DEFECTS IN A SEMICONDUCTOR MEMORY ARRAY
    Publication number: 20120127797
    Abstract: A system and method for testing semiconductor memory devices includes a variable voltage input to a memory cell control gate. The voltage to the control gate can be varied from a voltage level used for normal memory cell operation, such as a read operation, to a voltage level that can be used to detect a defect in the memory device. During testing, the voltage level applied to the control gate is lower than the voltage level applied to a second terminal, such as a drain terminal, of the memory cell. In some embodiments, testing for defects can include applying a negative voltage to the control gate, while a positive voltage is applied to the drain terminal, which can reveal the presence of a gate-to-drain leakage defect.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 24, 2012
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yin Chin Huang, Chu Pang Huang, Cheng Chi Liu, Min Kuang Li, Chang Chan Yang, Yi Fang Chang