Abstract: Disclosed is a semiconductor memory device. The semiconductor memory device includes: a first memory block; and a second memory block sharing a block word line with the first memory block, in which the block word line includes a first block word line disposed so as to overlap the first memory block and a second block word line disposed so as to overlap the second memory block. According to the present disclosure, it'is less likely to have an operation failure.

Abstract: A speech recognition method capable of automatic generation of phones according to the present invention includes: unsupervisedly learning a feature vector of speech data; generating a phone set by clustering acoustic features selected based on an unsupervised learning result; allocating a sequence of phones to the speech data on the basis of the generated phone set; and generating an acoustic model on the basis of the sequence of phones and the speech data to which the sequence of phones is allocated.

Abstract: Disclosed is a pressure detecting device having a temperature sensor, the device including: a housing having a first chamber, a second chamber, and a port part having a fluid guide tube that guides a pressure transmitting fluid to the second chamber; a lead frame coupled to the housing and configured for being connected to an external device; a circuit substrate electrically connected to the lead frame and including a first surface and a second surface; a pressure detecting element provided on the second surface of the circuit substrate and generating an electrical signal according to a pressure change; a tube coupled to the port part, whereby a first end of the tube is open and provided inside the first chamber; and a temperature detecting element provided inside the tube and transmitting an electrical signal generated according to a temperature change to the circuit substrate.

Abstract: Provided are an automatic interpretation system and method for generating a synthetic sound having characteristics similar to those of an original speaker's voice. The automatic interpretation system for generating a synthetic sound having characteristics similar to those of an original speaker's voice includes a speech recognition module configured to generate text data by performing speech recognition for an original speech signal of an original speaker and extract at least one piece of characteristic information among pitch information, vocal intensity information, speech speed information, and vocal tract characteristic information of the original speech, an automatic translation module configured to generate a synthesis-target translation by translating the text data, and a speech synthesis module configured to generate a synthetic sound of the synthesis-target translation.

Abstract: Disclosed are a semiconductor memory device, and an operating method thereof. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to perform a program pulse application operation and a verification operation on the memory cell array; a pass/fail check circuit configured to output a pass/fail signal according to a result of the verification operation; and a control logic configured to control the peripheral circuit to perform the program pulse application operation and the verification operation such that two or more program pulses are continuously applied during the program pulse application operation, and first and second verification operations are continuously performed during the verification operation.

Abstract: There are provided a memory chip and an operating method thereof. A memory chip includes a main memory block including a plurality of sub-memory blocks, a peripheral circuit for programming memory cells included in the sub-memory blocks in units of pages, and a control circuit for controlling the peripheral circuit such that, after a program operation of a sub-memory block selected among the sub-memory blocks is completed, a program operation of a sub-memory block selected next among the sub-memory blocks is performed.

Abstract: Disclosed are a semiconductor memory device, and an operating method thereof. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to perform a program pulse application operation and a verification operation on the memory cell array; a pass/fail check circuit configured to output a pass/fail signal according to a result of the verification operation; and a control logic configured to control the peripheral circuit to perform the program pulse application operation and the verification operation such that two or more program pulses are continuously applied during the program pulse application operation, and first and second verification operations are continuously performed during the verification operation.

Abstract: Disclosed are a semiconductor memory device, and an operating method thereof. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to perform a program pulse application operation and a verification operation on the memory cell array; a pass/fail check circuit configured to output a pass/fail signal according to a result of the verification operation; and a control logic configured to control the peripheral circuit to perform the program pulse application operation and the verification operation such that two or more program pulses are continuously applied during the program pulse application operation, and first and second verification operations are continuously performed during the verification operation.

Abstract: A voice signal processing apparatus includes: an input unit which receives a voice signal of a user; a detecting unit which detects an auxiliary signal, and a signal processing unit which transmits the voice signal to an external terminal in a first operation mode and transmits the voice signal and the auxiliary signal to the external terminal using the same or different protocols in a second operation mode.

Abstract: A system and a method of speech recognition which enable a spoken language to be automatically identified while recognizing speech of a person who vocalize to effectively process multilingual speech recognition without a separate process for user registration or recognized language setting such as use of a button for allowing a user to manually select a language to be vocalized and support speech recognition of each language to be automatically performed even though persons who speak different languages vocalize by using one terminal to increase convenience of the user.

Abstract: A thermal management system is provided which may be miniaturized and may have a reduced weight by integrating thermal management parts in a fuel cell vehicle. In particular, a new type of thermal management system integrated housing in which a housing of a pump housing part, a housing of a 3-way valve fluid part, and a bypass channel among parts of the thermal management system for a fuel cell vehicle are integrated into a single structure to reduce the size of the overall system.

Abstract: An embodiment of the invention may provide a semiconductor memory device including a memory cell array including a plurality of memory cells, a peripheral circuit unit configured to perform a program operation with respect to a memory cell selected from the plurality of memory cells, wherein first to third program voltage applying operations and first to third verifying operations are alternatively performed, and a control logic configured to control the peripheral circuit unit to perform the first to third program voltage applying operations and the first to third verifying operations and to increase a second program voltage applied during the second program voltage applying operation more than a first program voltage applied during the first program applying operation by a first step voltage and a third program voltage applied during the third program voltage applying operation more than the second program voltage by a second step voltage.

Abstract: Disclosed are a semiconductor memory device, and an operating method thereof. The semiconductor memory device includes: a memory cell array including a plurality of memory cells; a peripheral circuit configured to perform a program pulse application operation and a verification operation on the memory cell array; a pass/fail check circuit configured to output a pass/fail signal according to a result of the verification operation; and a control logic configured to control the peripheral circuit to perform the program pulse application operation and the verification operation such that two or more program pulses are continuously applied during the program pulse application operation, and first and second verification operations are continuously performed during the verification operation.

Abstract: A speech recognition apparatus and method are provided, the method including converting an input signal to acoustic model data, dividing the acoustic model data into a speech model group and a non-speech model group and calculating a first maximum likelihood corresponding to the speech model group and a second maximum likelihood corresponding to the non-speech model group, detecting a speech based on a likelihood ratio (LR) between the first maximum likelihood and the second maximum likelihood, obtaining utterance stop information based on output data of a decoder and dividing the input signal into a plurality of speech intervals based on the utterance stop information, calculating a confidence score of each of the plurality of speech intervals based on information on a prior probability distribution of the acoustic model data, and removing a speech interval having the confidence score lower than a threshold.

Abstract: A user terminal, hands-free device and method for hands-free automatic interpretation service. The user terminal includes an interpretation environment initialization unit, an interpretation intermediation unit, and an interpretation processing unit. The interpretation environment initialization unit performs pairing with a hands-free device in response to a request from the hands-free device, and initializes an interpretation environment. The interpretation intermediation unit sends interpretation results obtained by interpreting a user's voice information received from the hands-free device to a counterpart terminal, and receives interpretation results obtained by interpreting a counterpart's voice information from the counterpart terminal.

Abstract: A semiconductor memory device, a memory system including the same and an operating method thereof are set forth. The semiconductor memory device includes a memory cell array having a plurality of memory cells, peripheral circuits configured to perform a program operation using an incremental step pulse programming (ISPP) method on selected memory cells from among the plurality of memory cells. The semiconductor memory device includes an additional program using set program voltages to set memory cells, and a control logic configured to control the peripheral circuits to perform the program in the manner of the ISPP method and the additional program.

Abstract: A semiconductor memory device according to an embodiment of the present invention includes a first cell string and a second cell string coupled to a first word line group and a second word line group, respectively. An operating method of the semiconductor memory device may include forming a channel in the second cell string by applying a pass voltage to the second word line group, reflecting data of a selected memory cell coupled to a selected word line of the first word line group, among memory cells of the first cell string, on the channel of the second cell string through the bit line, and determining the data of the selected memory cell by sensing a quantity of electric charge of the second cell string through the bit line.

Abstract: The present invention relates to an automatic translation and interpretation apparatus and method. The apparatus includes a speech input unit for receiving a speech signal in a first language. A text input unit receives text in the first language. A sentence recognition unit recognizes a sentence in the first language desired to be translated by extracting speech features from the speech signal received from the speech input unit or measuring a similarity of each word of the text received from the text input unit. A translation unit translates the recognized sentence in the first language into a sentence in a second language. A speech output unit outputs uttered sound of the translated sentence in the second language in speech. A text output unit converts the uttered sound of the translated sentence in the second language into text transcribed in the first language and outputs the text.

Abstract: A semiconductor device includes a memory block including even memory cells configured to form an even page and odd memory cells configured to form an odd page. The semiconductor device may also include an operation circuit configured to perform a program operation on the even memory cells and the odd memory cells. A first verify operation may separately verify the even memory cells and the odd memory cells, and a second verify operation may simultaneously verify the even memory cells and the odd memory cells. Further, the operation circuit may be configured to selectively perform the first verify operation and the second verify operation depending on a number of adjacent program fail cells in response to a verify result value.

Abstract: A semiconductor device includes a memory block including memory cells coupled to word lines, and an operation circuit suitable for performing a program operation and a verify operation on memory cells coupled to a selected word line, wherein, when performing the program operation, the operation circuit applies a first program allowance voltage to a bit line of a first program fail cell to keep a program fall status, and a second program allowance voltage having a voltage level different from the first program allowance voltage to a bit line of a second program fail cell to change a program pass status to a program fail status.