Abstract: A display device includes: a pixel unit including first pixels in a first pixel region, second pixels in a second pixel region, and third pixels in a third pixel region; a first scan driver configured to drive first scan lines coupled to the first pixels; a second scan driver configured to drive second scan lines coupled to the second pixels; and a third scan driver configured to drive third scan lines coupled to the third pixels, wherein the first scan driver, the second scan driver, and the third scan driver differently set a supply order of a scan signal supplied to the first scan lines, the second scan lines, and the third scan lines, corresponding to a first mode and a second mode different from the first mode.

Abstract: A display device includes: first pixels at a first pixel area and connected to first scan lines; a first scan driver to supply first scan signals to the first scan lines; second pixels at a second pixel area and connected to second scan lines; a second scan driver to supply second scan signals to the second scan lines; third pixels at a third pixel area and connected to third scan lines; and a third scan driver to supply third scan signals to the third scan lines. In a first mode, each of the first scan signals has at least a portion having a first pulse width, and each of the second scan signals has at least a portion having a second pulse width different from the first pulse width.

Abstract: A display device includes a pixel unit including first pixels in a first pixel area, second pixels in a second pixel area, and third pixels in a third pixel area; a first scan driver including first multiplexers configured to operate in response to a first mode and a second mode different from the first mode, and to supply first scan signals to first scan lines connected to the first pixels; a second scan driver configured to supply second scan signals to second scan lines connected to the second pixels; and a third scan driver including second multiplexers configured to operate in response to the first mode and the second mode, and to supply third scan signals to third scan lines connected to the third pixels.

Abstract: A display device comprises a display panel including a plurality of active pixels and a plurality of dummy pixels adjacent to the plurality of active pixels and a control unit controlling a pixel driving circuit formed in each of the active pixels and a dummy driving circuit formed in each of the dummy pixels. The dummy driving circuit includes a dummy driving transistor, an A dummy transistor, and a B dummy transistor, and a control terminal of the A dummy transistor is connected to a control terminal of the dummy driving transistor, and an input terminal of the A dummy transistor is connected to an output terminal of the B dummy transistor, and an output terminal of the A dummy transistor is connected to an output terminal of the dummy driving transistor.

Abstract: A display device includes: a display panel including a plurality of gate lines on a substrate, a plurality of data lines crossing the gate lines, and a plurality of pixels, each of the pixels being coupled to one of the gate lines and to one of the data lines; a data driver configured to output data signals through a plurality of channel terminals; and a line selector configured to transmit the data signals to a plurality of data line blocks, each of the data line blocks including a plurality of data lines, wherein the line selector includes a plurality of thin-film transistors, and at least two of the thin-film transistors have different sizes.

Abstract: A display panel includes a distributor to transfer a second data signal to a second data line in a first period of a data period and to transfer a first data signal to a first data line in a second period of the data period, the second period being different from the first period; a first pixel electrically connected to the first data line, to initialize a first previous data signal in the data period in response to a first control signal, and to store the first data signal in the second period in response a scan signal; and a second pixel electrically connected to the second data line and to store the second data signal in the first period in response to the scan signal.

Abstract: A scan driver may include a first stage, a second stage, and a third stage. The first stage may include a first output transistor. The first output transistor may have a first buffer value. The second stage may be electrically connected to the first output transistor and may include a second output transistor. The second output transistor may have a second buffer value. The third stage may be electrically connected to the second output transistor and may include a third output transistor. The third output transistor may have a third buffer value. At least one of the second buffer value and the third buffer value may be unequal to the first buffer value.

Abstract: A display device includes: a display panel including a plurality of gate lines on a substrate, a plurality of data lines crossing the gate lines, and a plurality of pixels, each of the pixels being coupled to one of the gate lines and to one of the data lines; a data driver configured to output data signals through a plurality of channel terminals; and a line selector configured to transmit the data signals to a plurality of data line blocks, each of the data line blocks including a plurality of data lines, wherein the line selector includes a plurality of thin-film transistors, and at least two of the thin-film transistors have different sizes.

Abstract: A display device includes: a substrate comprising an active area; data lines extending in a first direction in the active area; scan lines extending in a second direction crossing the first direction in the active area; a plurality of repair lines extending in the first direction or in the second direction in the active area; and a multipath power line comprising a plurality of first wires in the active area and crossing the repair lines, and at least one second wire electrically connected to the first wires and extending in the active area to cross the first wires.

Abstract: According to exemplary embodiments of the present disclosure, a capacitor may be connected to a gate electrode of a transistor. The capacitor includes a first gate electrode connected to the gate electrode of the transistor, a gate insulation layer formed on the first gate electrode, and an upper electrode formed on the gate insulation layer. The upper electrode is formed to cover a region where the first gate electrode and the upper electrode are overlapped. The capacitor is applicable to at least one of a light emitting driving circuit and a scan driving circuit, and at least one of the light emitting driving circuit and the scan driving circuit may be included in a display device.

Abstract: A display device includes: a display panel including a plurality of gate lines on a substrate, a plurality of data lines crossing the gate lines, and a plurality of pixels, each of the pixels being coupled to one of the gate lines and to one of the data lines; a data driver configured to output data signals through a plurality of channel terminals; and a line selector configured to transmit the data signals to a plurality of data line blocks, each of the data line blocks including a plurality of data lines, wherein the line selector includes a plurality of thin-film transistors, and at least two of the thin-film transistors have different sizes.

Abstract: A stage circuit includes first and second supply units. The first supply unit outputs a scan signal to a first output terminal. The second supply unit outputs an emission control signal to a second output terminal. The second supply unit includes a first transistor and a second transistor. The first transistor is between a first power source and the second output terminal, and has a gate electrode coupled to a first node. The second transistor is between the second output terminal and a second power source, and has a gate electrode coupled to a second node. Third and fourth transistors are coupled in series between the first power source and first node. A gate electrode of the third transistor is coupled to the third input terminal, and a gate electrode of the fourth transistor is coupled to the sixth input terminal.

Abstract: An organic light emitting display device having a stage circuit capable of creating a scan signal and a light emitting control signal. The stage circuit includes a control unit controlling a first node and a second node corresponding to signals of a first input terminal, a third input terminal, and a fourth input terminal, a first output unit supplying a light emitting control signal to a second output terminal corresponding to voltages at the first node and the second node, and a second output unit supplying a scan signal having different polarity than that of the light emitting control signal to a first output terminal corresponding to a signal of a second input terminal and voltages at the first node and the second node.

Abstract: A driver includes a first circuit to output a scan signal and a second circuit to output an emission control signal. The first circuit outputs the scan signal based on a first set of clock signals, and the second circuit outputs the emission control signal based on a second set of clock signals. The first set of clock signals and the second set of clock signals have at least one same clock signal and at least one different clock signal. The second circuit receives the scan signal and outputs the emission control signal based on the scan signal. The first circuit may be a scan driver and the second circuit may be an emission control driver of a display device.

Abstract: A display device comprises a display panel including a plurality of active pixels and a plurality of dummy pixels adjacent to the plurality of active pixels and a control unit controlling a pixel driving circuit formed in each of the active pixels and a dummy driving circuit formed in each of the dummy pixels. The dummy driving circuit includes a dummy driving transistor, an A dummy transistor, and a B dummy transistor, and a control terminal of the A dummy transistor is connected to a control terminal of the dummy driving transistor, and an input terminal of the A dummy transistor is connected to an output terminal of the B dummy transistor, and an output terminal of the A dummy transistor is connected to an output terminal of the dummy driving transistor.

Abstract: A display panel includes a display pixel circuit and a repair pixel circuit. A first node of the display pixel circuit is electrically coupled to an anode of an organic light emitting diode. The repair pixel circuit includes a repair line that is extended in a direction of first through third scan lines. The display pixel circuit is coupled to the first scan line disposed at an (N)th row, and the repair pixel circuit is coupled to the first scan line disposed at an (N?1)th row, where N is an integer greater than or equal to 2.

Abstract: A display device includes: a display panel including a plurality of gate lines on a substrate, a plurality of data lines crossing the gate lines, and a plurality of pixels, each of the pixels being coupled to one of the gate lines and to one of the data lines; a data driver configured to output data signals through a plurality of channel terminals; and a line selector configured to transmit the data signals to a plurality of data line blocks, each of the data line blocks including a plurality of data lines, wherein the line selector includes a plurality of thin-film transistors, and at least two of the thin-film transistors have different sizes.

Abstract: A pixel capable of stably compensating for the threshold voltage of a driving transistor is disclosed. In one aspect, the pixel includes an organic light emitting diode (OLED), a first transistor for controlling an amount of current supplied from a first power supply coupled to a second node to the OLED to correspond to a voltage applied to a third node, and a second transistor coupled between the second node and a first node and turned on when a control signal is supplied to a control line. The pixel also includes a third transistor coupled between the third node and a reference power supply and turned on when the control signal is supplied, a first capacitor coupled between the first node and the first power supply, and a second capacitor coupled between the first node and the third node.

Abstract: A stage circuit including an output unit for supplying first or second power source to an output terminal is disclosed. The stage circuit may comprise a bidirectional driver for respectively supplying signals supplied to first and second input terminals, a first driver, and a second driver. The second driver controls the output unit to output the second power source to the output terminal without any voltage loss, corresponding to a second clock signal.

Abstract: A stage circuit includes first and second supply units. The first supply unit outputs a scan signal to a first output terminal. The second supply unit outputs an emission control signal to a second output terminal. The second supply unit includes a first transistor and a second transistor. The first transistor is between a first power source and the second output terminal, and has a gate electrode coupled to a first node. The second transistor is between the second output terminal and a second power source, and has a gate electrode coupled to a second node. Third and fourth transistors are coupled in series between the first power source and first node. A gate electrode of the third transistor is coupled to the third input terminal, and a gate electrode of the fourth transistor is coupled to the sixth input terminal.