Abstract: A display device includes a voltage wiring pattern in a non-display area and connected to a display area, and between a pad area and the voltage wiring pattern, a metal wiring pattern in the non-display area and connecting the pad area to the voltage wiring pattern, and a sealing member between the pad area and the voltage wiring pattern, and coupling the display panel to an encapsulation substrate. The metal wiring pattern including a lead-in portion connected to the pad area, an overlapping portion overlapping the sealing member, and a connection portion connecting the overlapping portion to the voltage wiring pattern. The overlapping portion includes a first portion corresponding to the lead-in portion, a second portion corresponding to the connection portion, and a third portion extending from the second portion in a direction away from the first portion.

Abstract: A skin-permeable peptide, a derivative thereof, or a fragment thereof of the present disclosure effectively delivers skin bioactive molecules deep into the skin tissues through assembly or fusion methods, thereby providing outstanding skin permeability as well as excellent skin residual effect of bioactive materials to maximize bioactive efficacy. Accordingly, the skin-permeable peptide, derivative thereof, or fragment thereof may be widely used as an active ingredient of a pharmaceutical composition for external use and a functional cosmetic composition that target skin tissues including mucous membranes.

Abstract: A Maclura pubescens extract or fraction or a Prunus cerasoides extract or fraction having neuroglobin (Ngb) activation and neuroprotective effects and, on the basis thereof, a neuroprotective composition containing, as an active ingredient, a Maclura pubescens extract or fraction or a Prunus cerasoides extract or fraction. The neuroprotective composition can be used, through the activation of neuroglobin (Ngb), as a pharmaceutical composition or a food composition for treatment, alleviation and prevention of a stroke, a cerebral infarction, thrombosis, cerebral degenerative disease, vascular dementia, memory loss, short-term memory impairment, a concentration disorder, anxiety, nervousness and the like, and for brain damage protection, brain function improvement and cranial nerve cell protection.

Abstract: An implantable lead having adjustable electrode locations and a system for controlling the same. The implantable lead may include a plurality of first electrodes exposed and formed at an upper part of a main body at given intervals, a plurality of second electrodes coupled to a stepped lower part of the main body and configured to deliver a stimulus signal to a core area into which the lead is inserted, and a plurality of signal lines embedded in the main body and configured to connect the first electrodes and the second electrodes in a one-to-one manner. In this case, a slot for coupling and up and down movement of the second electrodes may be formed in the lower part. As the second electrodes are individually moved along the slot by an external force acting on the signal lines, locations of the second electrodes in the lower part may be adjusted.

Abstract: The present disclosure relates to a recycled cathode active material, a method of producing the same, and a secondary battery including the same. Specifically, the method of producing a recycled cathode active material according to the present disclosure includes: step (a) of separating a current collector from a cathode active material layer and recovering a cathode active material in the cathode active material layer by thermally decomposing a binder and a conductive material in the cathode active material layer by heat-treating a waste cathode including the current collector and the cathode active material layer formed on the current collector; and step (b) of adding a lithium precursor and a cobalt-containing coating agent to the recovered cathode active material and performing annealing.

Abstract: The present disclosure relates to a recycled positive electrode active material, a method of producing the recycled positive electrode active material, and a secondary battery including the same. The recycled positive electrode active material, including: 60 mol % or more of Ni; and crystalline LiF, or 0.24% by weight or less of residual Li2CO3, where the recycled positive electrode active material is one or more selected from the group consisting of a lithium nickel oxide (LNO)-based positive electrode active material, a nickel·cobalt·manganese (NCM)-based positive electrode active material, a nickel·cobalt·aluminum (NCA)-based positive electrode active material, and a nickel·cobalt·manganese·aluminum (NCMA)-based positive electrode active material.

Abstract: The present disclosure relates to a recycled positive electrode active material, a method of producing the recycled positive electrode active material, and a secondary battery including the same. The recycled positive electrode active material, including: 60 mol % or more of Ni, 250 mg/kg or less of fluorine (F), and having a crystallite size of 122 nm or less, where the recycled positive electrode active material is one or more selected from the group consisting of a lithium nickel oxide (LNO)-based positive electrode active material, a nickel·cobalt·manganese (NCM)-based positive electrode active material, a nickel·cobalt·aluminum (NCA)-based positive electrode active material, and a nickel·cobalt·manganese·aluminum (NCMA)-based positive electrode active material.

Abstract: The present invention relates to a cured product having excellent stain resistance and low gloss, a method of manufacturing the same, and an interior material including the cured product. The cured product according to the present invention includes, along with an acrylic oligomer, an oligomer having a functional group containing silicon (Si) and an oligomer having a functional group containing fluorine (F), and thus, has excellent stain resistance and can implement a micro-folded structure on a surface thereof through extreme ultraviolet rays to be used during curing, thereby being capable of realizing low gloss without a matting agent.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. A memory system may include a memory device and a memory controller configured to, when receiving from the host a flush command instructing to flush data cached in a data cache to the memory device, flush first data cached in the data cache, the first data having a size smaller than a size of the reference write unit, to the memory device, write a first parity associated with the first data to a parity memory block, update a value of a parity location pointer indicating a location where the first parity is written, and set a parity write flag indicating whether the parity at the location pointed by the parity location pointer is valid.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device including a meta area, a normal area, and a state area, includes sensing a turn-on of a memory system including the controller, checking a last state flag among at least one or more state flags stored in the state area, and determining whether to perform a reclaim operation on meta data stored in the meta area based on the checked state flag.

Abstract: Embodiments of the disclosed technology relate to a memory system, and a memory controller and a method of operating the same. In performing a recovery operation after occurrence of sudden power off (SPO), by determining whether to delete, from a memory device, journaling information associated with data stored in a target open memory block based on the state of the memory device, thereby preventing unnecessary data movement in a situation where the number of free memory blocks included in the memory device is insufficient, and maintaining the number of free memory blocks included in the memory device to a predetermined value or more.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. A memory system may include a memory device and a memory controller configured to, when receiving from the host a flush command instructing to flush data cached in a data cache to the memory device, flush first data cached in the data cache, the first data having a size smaller than a size of the reference write unit, to the memory device, write a first parity associated with the first data to a parity memory block, update a value of a parity location pointer indicating a location where the first parity is written, and set a parity write flag indicating whether the parity at the location pointed by the parity location pointer is valid.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device including a meta area, a normal area, and a state area, includes sensing a turn-on of a memory system including the controller, checking a last state flag among at least one or more state flags stored in the state area, and determining whether to perform a reclaim operation on meta data stored in the meta area based on the last state flag.

Abstract: Embodiments of the disclosed technology relate to a memory system, and a memory controller and a method of operating the same. In performing a recovery operation after occurrence of sudden power off (SPO), by determining whether to delete, from a memory device, journaling information associated with data stored in a target open memory block based on the state of the memory device, thereby preventing unnecessary data movement in a situation where the number of free memory blocks included in the memory device is insufficient, and maintaining the number of free memory blocks included in the memory device to a predetermined value or more.