Abstract: A method and an apparatus for checking a signal line are provided. The method includes: obtaining custom design information of a target signal line in a circuit schematic, and generating a layout design rule corresponding to the target signal line based on the custom design information; checking whether the target signal line meets the layout design rule in a circuit layout corresponding to the circuit schematic; and adding a first label to a position of the target signal line in the circuit layout when the target signal line in the circuit layout does not meet the layout design rule. The first label is configured to indicate that the target signal line does not meet the layout design rule.

Abstract: A method and an apparatus for checking a signal line are provided. The method includes: obtaining custom design information of a target signal line in a circuit schematic, and generating a layout design rule corresponding to the target signal line based on the custom design information; checking whether the target signal line meets the layout design rule in a circuit layout corresponding to the circuit schematic; and adding a first label to a position of the target signal line in the circuit layout when the target signal line in the circuit layout does not meet the layout design rule. The first label is configured to indicate that the target signal line does not meet the layout design rule.

Abstract: A method for improve or reconstruct an existing or putative portfolio with different assets. Construct two kinds of “centroids” in order to reduce estimation-errors and uncertainties of the future. Then base on prior knowledge of risk region and uncertainty, one can construct their own weighted efficient frontier after their using the classic MV method and complete the next stage with a specified risk objective.

Abstract: A method for driving a semiconductor memory device includes controlling a plurality of erase voltages for a plurality of memory blocks, respectively, comparing the plurality of controlled erase voltages, and determining whether or not to enable the plurality of memory blocks for a subsequent write operation in response to a result of the comparison.

Abstract: A method for driving a semiconductor memory device includes controlling a plurality of erase voltages for a plurality of memory blocks, respectively, comparing the plurality of controlled erase voltages, and determining whether or not to enable the plurality of memory blocks for a subsequent write operation in response to a result of the comparison.