Patents by Inventor Min-Rui LAI

Min-Rui LAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11656644
    Abstract: A control circuit of a power converter includes a first sensing circuit, a reference voltage generation circuit, an error amplifying circuit and a PWM circuit. The first sensing circuit, coupled to a first output circuit, provides a first current sensing signal. The reference voltage generation circuit, coupled to the first sensing circuit, provides a reference voltage according to the first current sensing signal. The error amplifying circuit, coupled to the reference voltage generation circuit, receives the reference voltage and an output feedback voltage of the power converter to provide an error amplifying signal. The PWM circuit, coupled between the error amplifying circuit and the first output circuit, receives the error amplifying signal and provides a control signal to control the first output circuit. The reference voltage generation circuit further receives the error amplifying signal and adjusts the reference voltage it generates according to the error amplifying signal.
    Type: Grant
    Filed: August 9, 2021
    Date of Patent: May 23, 2023
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Wei-Hsiu Hung, Min-Rui Lai, Chih-Lien Chang
  • Patent number: 11616431
    Abstract: A control circuit of a power converter includes a sensing circuit, a ramp signal generation circuit and a PWM circuit. The sensing circuit, coupled to an output circuit, provides a current sensing signal. The ramp signal generation circuit includes a transient circuit and a signal generation circuit. The transient circuit receives the current sensing signal and generates a variable reference voltage. The signal generation circuit provides a ramp signal according to the variable reference voltage. The PWM circuit provides a PWM signal to the output circuit according to the ramp signal. When current sourcing occurs, it continues for a first default time. A transient state during current sourcing continues for a second default time less than first default time. The variable reference voltage is changed from a default value to an adjusted value during the second default time and restored to the default value after the second default time.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: March 28, 2023
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Chih-Lien Chang, Wei-Hsiu Hung, Chun-Ming Lu, Min-Rui Lai
  • Publication number: 20220149734
    Abstract: A control circuit of a power converter includes a sensing circuit, a ramp signal generation circuit and a PWM circuit. The sensing circuit, coupled to an output circuit, provides a current sensing signal. The ramp signal generation circuit includes a transient circuit and a signal generation circuit. The transient circuit receives the current sensing signal and generates a variable reference voltage. The signal generation circuit provides a ramp signal according to the variable reference voltage. The PWM circuit provides a PWM signal to the output circuit according to the ramp signal. When current sourcing occurs, it continues for a first default time. A transient state during current sourcing continues for a second default time less than first default time. The variable reference voltage is changed from a default value to an adjusted value during the second default time and restored to the default value after the second default time.
    Type: Application
    Filed: October 27, 2021
    Publication date: May 12, 2022
    Inventors: Chih-Lien CHANG, Wei-Hsiu HUNG, Chun-Ming LU, Min-Rui LAI
  • Publication number: 20220050487
    Abstract: A control circuit of a power converter includes a first sensing circuit, a reference voltage generation circuit, an error amplifying circuit and a PWM circuit. The first sensing circuit, coupled to a first output circuit, provides a first current sensing signal. The reference voltage generation circuit, coupled to the first sensing circuit, provides a reference voltage according to the first current sensing signal. The error amplifying circuit, coupled to the reference voltage generation circuit, receives the reference voltage and an output feedback voltage of the power converter to provide an error amplifying signal. The PWM circuit, coupled between the error amplifying circuit and the first output circuit, receives the error amplifying signal and provides a control signal to control the first output circuit. The reference voltage generation circuit further receives the error amplifying signal and adjusts the reference voltage it generates according to the error amplifying signal.
    Type: Application
    Filed: August 9, 2021
    Publication date: February 17, 2022
    Inventors: Wei-Hsiu HUNG, Min-Rui LAI, Chih-Lien CHANG
  • Patent number: 10879794
    Abstract: A dc-dc controller is provided. The dc-dc controller includes a current sensing pin, a zero-current comparator, a comparison circuit and a threshold adjustment circuit. The current sensing pin is coupled to an output stage to receive a current sensing signal related to the output current. The zero-current comparator is coupled to the current sensing pin, and receives the current sensing signal and a first preset value to provide a zero-current signal. The comparison circuit is coupled to the zero-current comparator and the current sensing pin, and compares the current sensing signal with a second preset value to provide an adjustment signal. The threshold adjustment circuit is coupled to the comparison circuit and the zero-current comparator, and generates the first preset value according to the adjustment signal.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: December 29, 2020
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Patent number: 10637454
    Abstract: A pulse-width modulation (PWM) controller including an output pin, a temporary voltage generation circuit and a tri-state voltage generation circuit is disclosed. The temporary voltage generation circuit includes a voltage-dividing unit and a control unit. The voltage-dividing unit is coupled to the output pin and the control unit respectively. The control unit receives an enable signal and a PWM signal. The tri-state voltage generation circuit is coupled to the temporary voltage generation circuit and the output pin and receives the enable signal, the PWM signal and a tri-state input voltage. When the PWM controller is operated in a tri-state mode, the control unit controls the voltage-dividing unit to provide a temporary voltage to the output pin according to the enable signal and PWM signal, and then the tri-state voltage generation circuit provides a tri-state voltage to the output pin according to the enable signal and PWM signal.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: April 28, 2020
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Patent number: 10587191
    Abstract: A dc-dc converting circuit and a method for controlling the same are provided. The dc-dc converting circuit includes an output stage, a mode detection circuit, a PWM signal generating circuit and a ramp signal generating circuit. The output stage provides an output voltage. The mode detection circuit provides a mode detection signal. The PWM generating circuit provides a time signal to the output stage. When the dc-dc converting circuit enters a continuous conduction mode from a discontinuous conduction mode, the ramp signal generating circuit provides a second ramp signal to the PWM signal generating circuit in a preset time according to the mode detection signal. The ramp signal generating circuit provides a first ramp signal to the PWM signal generating circuit after the preset time. A slope of the second ramp signal is greater than a slope of the first ramp signal.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: March 10, 2020
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Patent number: 10574141
    Abstract: A current mirror calibration circuit, coupled to an error amplifier of a pulse-width modulation controller, includes a first voltage generation unit, a second voltage generation unit, a calibration unit and a current mirror circuit. During an initial period, the first voltage generation unit and second voltage generation unit provide a first default voltage and a second default voltage respectively. The current mirror circuit includes a first current unit and a second current unit. The first current unit receives an original current. The second current unit generates a mirror current having a proportional relationship with original current. The first current unit has a first node coupled to the first voltage generation unit and a second node coupled to a third default voltage. The second current unit has a third node coupled to the second voltage generation unit and calibration unit and a fourth node coupled to calibration unit and an output terminal of error amplifier.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: February 25, 2020
    Assignee: UPI SEMICONDUCTOR CORP
    Inventors: Chih-Lien Chang, Pei-Ling Hong, Min-Rui Lai
  • Patent number: 10511228
    Abstract: A DC-DC converting controller coupled to an output stage and an external resistor network and providing a pulse-width-modulation (PWM) signal to control the output stage to provide an output voltage is disclosed. The DC-DC converting controller includes a sensing circuit, a droop current circuit, a first pin and a PWM signal control loop. The sensing circuit, coupled to the output stage, provides a sensing current. The droop current circuit, coupled to the sensing circuit, provides a droop current according to the sensing current. The first pin, coupled to the droop current circuit and external resistor network, provides the droop current to make the external resistor network provide a second reference voltage. The PWM signal control loop, coupled to the external resistor network, generates a PWM signal according to the output voltage and the second reference voltage. The droop current is reduced to a default value with a default time.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: December 17, 2019
    Assignee: UPI SEMICONDUCTOR CORP.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Publication number: 20190356223
    Abstract: A dc-dc converting circuit and a method for controlling the same are provided. The dc-dc converting circuit includes an output stage, a mode detection circuit, a PWM signal generating circuit and a ramp signal generating circuit. The output stage provides an output voltage. The mode detection circuit provides a mode detection signal. The PWM generating circuit provides a time signal to the output stage. When the dc-dc converting circuit enters a continuous conduction mode from a discontinuous conduction mode, the ramp signal generating circuit provides a second ramp signal to the PWM signal generating circuit in a preset time according to the mode detection signal. The ramp signal generating circuit provides a first ramp signal to the PWM signal generating circuit after the preset time. A slope of the second ramp signal is greater than a slope of the first ramp signal.
    Type: Application
    Filed: January 31, 2019
    Publication date: November 21, 2019
    Applicant: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Publication number: 20190356220
    Abstract: A dc-dc controller is provided. The dc-dc controller includes a current sensing pin, a zero-current comparator, a comparison circuit and a threshold adjustment circuit. The current sensing pin is coupled to an output stage to receive a current sensing signal related to the output current. The zero-current comparator is coupled to the current sensing pin, and receives the current sensing signal and a first preset value to provide a zero-current signal. The comparison circuit is coupled to the zero-current comparator and the current sensing pin, and compares the current sensing signal with a second preset value to provide an adjustment signal. The threshold adjustment circuit is coupled to the comparison circuit and the zero-current comparator, and generates the first preset value according to the adjustment signal.
    Type: Application
    Filed: March 7, 2019
    Publication date: November 21, 2019
    Applicant: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Min-Rui Lai
  • Publication number: 20190296639
    Abstract: A current mirror calibration circuit, coupled to an error amplifier of a pulse-width modulation controller, includes a first voltage generation unit, a second voltage generation unit, a calibration unit and a current mirror circuit. During an initial period, the first voltage generation unit and second voltage generation unit provide a first default voltage and a second default voltage respectively. The current mirror circuit includes a first current unit and a second current unit. The first current unit receives an original current. The second current unit generates a mirror current having a proportional relationship with original current. The first current unit has a first node coupled to the first voltage generation unit and a second node coupled to a third default voltage. The second current unit has a third node coupled to the second voltage generation unit and calibration unit and a fourth node coupled to calibration unit and an output terminal of error amplifier.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 26, 2019
    Inventors: Chih-Lien CHANG, Pei-Ling HONG, Min-Rui LAI
  • Publication number: 20190288675
    Abstract: A pulse-width modulation (PWM) controller including an output pin, a temporary voltage generation circuit and a tri-state voltage generation circuit is disclosed. The temporary voltage generation circuit includes a voltage-dividing unit and a control unit. The voltage-dividing unit is coupled to the output pin and the control unit respectively. The control unit receives an enable signal and a PWM signal. The tri-state voltage generation circuit is coupled to the temporary voltage generation circuit and the output pin and receives the enable signal, the PWM signal and a tri-state input voltage. When the PWM controller is operated in a tri-state mode, the control unit controls the voltage-dividing unit to provide a temporary voltage to the output pin according to the enable signal and PWM signal, and then the tri-state voltage generation circuit provides a tri-state voltage to the output pin according to the enable signal and PWM signal.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 19, 2019
    Inventors: CHIH-LIEN CHANG, MIN-RUI LAI
  • Publication number: 20190245447
    Abstract: A DC-DC converting controller coupled to an output stage and an external resistor network and providing a pulse-width-modulation (PWM) signal to control the output stage to provide an output voltage is disclosed. The DC-DC converting controller includes a sensing circuit, a droop current circuit, a first pin and a PWM signal control loop. The sensing circuit, coupled to the output stage, provides a sensing current. The droop current circuit, coupled to the sensing circuit, provides a droop current according to the sensing current. The first pin, coupled to the droop current circuit and external resistor network, provides the droop current to make the external resistor network provide a second reference voltage. The PWM signal control loop, coupled to the external resistor network, generates a PWM signal according to the output voltage and the second reference voltage. The droop current is reduced to a default value with a default time.
    Type: Application
    Filed: January 28, 2019
    Publication date: August 8, 2019
    Inventors: CHIH-LIEN CHANG, MIN-RUI LAI
  • Patent number: 9401694
    Abstract: An operational transconductance amplifier includes a fully-differential amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The fully-differential amplifying circuit is configured for receiving a differential input voltage and providing a differential output voltage. The fully-differential amplifying circuit includes a plurality of diffusor-differential-pair circuits. The bias driving circuit is configured for providing at least one first bias current to drive the fully-differential amplifying circuit and adjust the transconductance of the transconductance amplifier. The common mode feedback circuit is configured for stabilizing the differential output voltage. An operational transconductance amplifier-capacitor (OTA-C) filter and a high order filter are disclosed herein as well.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: July 26, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Sheng-Yu Peng, Hung-Yu Shih, Min-Rui Lai, Chiang-His Lee, Tzu-Yun Wang
  • Patent number: 9337779
    Abstract: An operational transconductance amplifier includes a cascode differential-pair amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The cascode differential-pair amplifying circuit is configured for receiving a differential input voltage and for providing a differential output voltage. The bias driving circuit is configured for providing a first bias current to drive the cascode differential-pair amplifying circuit and for adjusting the transconductance of the transconductance amplifier. The bias driving circuit includes a first floating-gate transistor. The first floating-gate transistor is configured for adjusting the first bias current. The common mode feedback circuit is configured for adjusting a second bias current of the cascode differential-pair amplifying circuit according to the differential output voltage so that the differential output voltage is stabilized.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: May 10, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Tzu-Yun Wang, Min-Rui Lai, Sheng-Yu Peng
  • Publication number: 20150200648
    Abstract: An operational transconductance amplifier includes a fully-differential amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The fully-differential amplifying circuit is configured for receiving a differential input voltage and providing a differential output voltage. The fully-differential amplifying circuit includes a plurality of diffusor-differential-pair circuits. The bias driving circuit is configured for providing at least one first bias current to drive the fully-differential amplifying circuit and adjust the transconductance of the transconductance amplifier. The common mode feedback circuit is configured for stabilizing the differential output voltage. An operational transconductance amplifier-capacitor (OTA-C) filter and a high order filter are disclosed herein as well.
    Type: Application
    Filed: August 7, 2014
    Publication date: July 16, 2015
    Inventors: Sheng-Yu PENG, Hung-Yu SHIH, Min-Rui LAI, Chiang-His LEE, Tzu-Yun WANG
  • Publication number: 20150200635
    Abstract: An operational transconductance amplifier includes a cascode differential-pair amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The cascode differential-pair amplifying circuit is configured for receiving a differential input voltage and for providing a differential output voltage. The bias driving circuit is configured for providing a first bias current to drive the cascode differential-pair amplifying circuit and for adjusting the transconductance of the transconductance amplifier. The bias driving circuit includes a first floating-gate transistor. The first floating-gate transistor is configured for adjusting the first bias current. The common mode feedback circuit is configured for adjusting a second bias current of the cascode differential-pair amplifying circuit according to the differential output voltage so that the differential output voltage is stabilized.
    Type: Application
    Filed: July 1, 2014
    Publication date: July 16, 2015
    Inventors: Tzu-Yun WANG, Min-Rui LAI, Sheng-Yu PENG