Patents by Inventor Min Seog Choi

Min Seog Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080112059
    Abstract: An optical lens is provided. The optical lens provides miniaturization and thin size, and reduces the cost and improves productivity by simplifying the structure and manufacturing process. The optical lens includes a light-transmitting substrate with a lens chamber and a fluidic chamber that are connected with each other. The optical lens also includes a light-transmitting elastic film which seals the lens chamber, a buffer elastic film which seals the fluidic chamber, and an actuator on the buffer elastic film which corresponds to the fluidic chamber, and varies the volume of the fluidic chamber to vary a pressure acting on the light-transmitting elastic film.
    Type: Application
    Filed: March 22, 2007
    Publication date: May 15, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Tae Choi, Seung Wan Lee, Woon Bae Kim, Min Seog Choi, Eun Sung Lee, Kyu Dong Jung
  • Publication number: 20080023780
    Abstract: An image pickup device comprises: a sensor substrate having image sensors arranged in its image pickup region in the form of a matrix; an interlayer insulating film layer formed below a bottom of the sensor substrate, the interlayer insulating film layer including wiring layers formed therein to construct an electric circuit, the wiring layer being electrically connected with the image sensors; a support substrate attached on a bottom of the interlayer insulating film layer, the support substrate having contact electrodes formed in via holes; a lens layer formed over the top surface of the sensor substrate to be opposite to the interlayer insulating film layer; and a light-transmitting member formed over the lens layer.
    Type: Application
    Filed: January 31, 2007
    Publication date: January 31, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyu Dong Jung, Woon Bae Kim, Min Seog Choi, Seung Wan Lee
  • Publication number: 20070228403
    Abstract: A micro-element package module which can reduce manufacturing costs and can be advantageous for mass production due to simplifying its structure and manufacturing process, and also can facilitate miniaturization and promote thinness, and a method of manufacturing the micro-element package module. The micro-element package module includes: an element substrate having a micro-element on a top surface of the element substrate; a circuit substrate that is provided around the element substrate; and an element housing that is provided above the element substrate and the circuit substrate, and includes a connecting section for electrically connecting the micro-element and the circuit substrate.
    Type: Application
    Filed: October 24, 2006
    Publication date: October 4, 2007
    Inventors: Min Seog Choi, Seung Wan Lee, Woon Bae Kim, Kyu Dong Jung
  • Publication number: 20070216028
    Abstract: A micro-element package which can reduce manufacturing costs and can be advantageous for mass production due to simplifying its structure and manufacturing process, and also can facilitate miniaturization and promote thinness, and a method of manufacturing the micro-element package. The micro-element package includes: a substrate having a micro-element on its top surface and a comparatively thin surrounding portion provided around the micro-element; and a circuit board that is electrically connected to the micro-element by utilizing the surrounding portion as a medium.
    Type: Application
    Filed: September 20, 2006
    Publication date: September 20, 2007
    Inventors: Seung Wan Lee, Min Seog Choi, Kyu Dong Jung, Woon Bae Kim
  • Publication number: 20070210399
    Abstract: A method of manufacturing a micro-element package which can reduce a manufacturing cost and improve productivity by simplifying its structure and manufacturing process, and also can make contributions to miniaturization and thinness, and the micro-element package are provided. The method of the micro-element package including: providing a substrate having a micro-element on its top surface and a transparent cover having a groove on its bottom surface; attaching the transparent cover on the substrate, wherein the bottom surface of the transparent cover where the groove is formed faces the micro-element; exposing the groove by selectively eliminating the transparent cover; and dicing the substrate along the exposed groove.
    Type: Application
    Filed: October 23, 2006
    Publication date: September 13, 2007
    Inventors: Seung Wan Lee, Woon Bae Kim, Kyu Dong Jung, Min Seog Choi
  • Publication number: 20070020817
    Abstract: A wafer level encapsulation chip and an encapsulation chip manufacturing method. The encapsulation chip includes a device substrate, a circuit module mounted on the device substrate, a bonding layer deposited on a predetermined area of the device substrate, a protection cap forming a cavity over the circuit module and bonded to the device substrate by the bonding layer and encapsulation portions formed on predetermined areas of the bonding layer and the protection cap. Thus, the present invention can minimize damages to a chip upon chip handling and prevent moisture from being introduced into the inside of the chip.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 25, 2007
    Inventors: Byung-gil Jeong, In-sang Song, Woon-bae Kim, Min-seog Choi, Suk-jin Ham, Ji-hyuk Lim
  • Publication number: 20070013058
    Abstract: A packaging chip formed with plural wafers. The packaging chip includes plural wafers stacked in order and plural interconnection electrodes directly connecting the plural wafers from an upper surface of an uppermost wafer of the plural wafers to the other wafers. At least one or more of the plural wafers mounts a predetermined circuit device thereon. Further, at least one or more wafers of the plural wafers have a cavity of a predetermined size. Meanwhile, the packaging chip further includes plural pads independently arranged on the upper surface of the uppermost wafer one another and electrically connected to the plural interconnection electrodes respectively. Accordingly, the present invention can enhance the performance and reliability of a packaging chip and improve fabrication yield.
    Type: Application
    Filed: July 6, 2006
    Publication date: January 18, 2007
    Inventors: Min-seog Choi, Kae-dong Back, In-sang Song, Woon-bae Kim, Byung-gil Jeong, Kyu-dong Jung
  • Publication number: 20060180409
    Abstract: A spring structure for supporting a floating member and a micro-structure having the same. The spring structure includes: at least one support post unit fixed to a substrate; and at least one spring unit having a first spring connected to the support post unit and extending in a predetermined direction from the support post unit, a second spring member connected to a floating member and extending in the same direction as the first spring unit from the floating member, and a connection member arranged normal to the first and second spring members and interconnecting the tip ends of the first and second spring members. Because the first spring member and the second spring member are arranged to be expanded or contracted along with the floating member when the temperature changes, the first and second spring members are not subject to stress caused due to the difference in thermal expansion coefficient.
    Type: Application
    Filed: December 23, 2005
    Publication date: August 17, 2006
    Inventors: Soon-cheol Kweon, Hyung-jae Shin, Sang-hun Lee, Min-seog Choi, Che-heung Kim, Young-tack Houng
  • Patent number: 7008817
    Abstract: A method for manufacturing micro electro-mechanical systems includes forming an insulation layer on an upper surface of a semiconductor substrate, forming a structure layer on an upper surface of the insulation layer and etching the structure layer, forming an under bump metal on a predetermined position of an upper surface of the structure layer, forming a via hole in a glass substrate corresponding to the position of the under bump metal and in a shape such that the via hole is larger in diameter at an upper surface of the glass substrate than at a lower surface of the glass substrate, wherein the glass substrate is bonded to the upper surface of the structure layer and creates a vacuum chamber that protects a structure of the structure layer, and arranging a solder ball in the via hole and bonding the solder ball to the under bump metal.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: March 7, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woon-bae Kim, Sung-hoon Choa, Min-seog Choi
  • Publication number: 20050009315
    Abstract: A method for manufacturing micro electro-mechanical systems includes forming an insulation layer on an upper surface of a semiconductor substrate, forming a structure layer on an upper surface of the insulation layer and etching the structure layer, forming an under bump metal on a predetermined position of an upper surface of the structure layer, forming a via hole in a glass substrate corresponding to the position of the under bump metal and in a shape such that the via hole is larger in diameter at an upper surface of the glass substrate than at a lower surface of the glass substrate, wherein the glass substrate is bonded to the upper surface of the structure layer and creates a vacuum chamber that protects a structure of the structure layer, and arranging a solder ball in the via hole and bonding the solder ball to the under bump metal.
    Type: Application
    Filed: February 23, 2004
    Publication date: January 13, 2005
    Inventors: Woon-bae Kim, Sung-hoon Choa, Min-seog Choi
  • Publication number: 20040231584
    Abstract: A spin coating apparatus for coating photoresist has a spin chuck and a nozzle part. The spin chuck has a mount part on which a wafer is mounted and an extended projection part on which edge-bead is formed. The nozzle part is for depositing photoresist onto the wafer mounted on the mount part of the spin chuck. By using the spin coating apparatus, edge-bead is formed on the extended projection part, and not on the wafer.
    Type: Application
    Filed: March 11, 2004
    Publication date: November 25, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Eun-sung Lee, Sung-hoon Choa, Min-seog Choi
  • Patent number: 6203689
    Abstract: An electropolishing apparatus for polishing an inner face of a deep hole of an article comprises a support for holding an article so that the article is maintained to erect in an electrolytic bath, and an electrode to be inserted into a deep hole of the article. The electrode is a hollow member having a through hole formed longitudinally. Electrolyte is supplied into the through hole of the electrode from upside. The electrolyte flows through the through hole of the electrode, a gap between the lower end of the electrode and the bottom of the hole, and another gap to be between an outer face of the electrode and an inner face of the hole. A plurality of removers consisting of nonwoven fabric may be fixed around the electrode. The support and the article rotate, while the electrode moves up and down. Furthermore, a plurality of magnets may be arranged around the article so that a magnetic field is formed in a zone including the article.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: March 20, 2001
    Assignee: Korea Advanced Institute Science and Technology
    Inventors: Jeong Du Kim, Min Seog Choi