Patents by Inventor MIN SEON AHN

MIN SEON AHN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NANOSTRUCTURE FOR DETECTING VIRUSES CONTAINING AMPHIPATHIC POLYMER AND DIAGNOSTIC PLATFORM USING THE SAME
    Publication number: 20240133888
    Abstract: The present disclosure relates to a nanostructure for detecting viruses including an amphipathic polymer, and a diagnostic platform using the same, wherein the nanostructure is capable of specifically detecting viruses through silica-based nanoparticles with excellent stability and high dispersion and a biocompatible amphipathic polymer, such that it is possible to develop a diagnostic platform with high sensitivity through binding and agglomeration of the nanostructure and viruses and enable rapid and accurate diagnosis of a target virus.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Applicant: KNU-INDUSTRY COOPERATION FOUNDATION
    Inventors: HYUN OUK KIM, JAE WON CHOI, SO JIN SHIN, YU RIM AHN, HEE WON AN, MIN SE KIM, HAK SEON KIM
  • Electronic systems including heterogeneous multi-core processors and methods of operating same
    Patent number: 9588577
    Abstract: A method of operating an electronic system including a heterogeneous multi-core processor is provided. The method includes measuring the temperature and/or workload of a big (high-performance) core and switching a current core load from the big core to a small (low-power) core in response to the measured temperature and workload of the big core.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: March 7, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Seon Ahn, Ki Soo Yu, Jae Choon Kim, Chi Gwan Oh, Myung Kyoon Yim
  • SEMICONDUCTOR PACKAGE AND THREE-DIMENSIONAL SEMICONDUCTOR PACKAGE INCLUDING THE SAME
    Publication number: 20160315029
    Abstract: There is provided a semiconductor package including: a semiconductor chip; and an extension die provided on the semiconductor chip, wherein the semiconductor chip includes a heating point configured to generate a temperature greater than or equal to a pre-determined reference temperature in the semiconductor chip, the heating point provided in a center region of the extension die
    Type: Application
    Filed: February 9, 2016
    Publication date: October 27, 2016
    Inventors: Dong-Han LEE, Je-Gil MOON, Wook KIM, Min-Seon AHN, Yun-Hyeok IM, Kee-Moon CHUN, Jae-Soo CHAUNG, Bum-Keun CHOI, Jung-Su HA
  • ELECTRONIC SYSTEMS INCLUDING HETEROGENEOUS MULTI-CORE PROCESSORS AND METHODS OF OPERATING SAME
    Publication number: 20150121105
    Abstract: A method of operating an electronic system including a heterogeneous multi-core processor is provided. The method includes measuring the temperature and/or workload of a big (high-performance) core and switching a current core load from the big core to a small (low-power) core in response to the measured temperature and workload of the big core.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 30, 2015
    Inventors: MIN SEON AHN, KI SOO YU, JAE CHOON KIM, CHI GWAN OH, MYUNG KYOON YIM