Patents by Inventor Min-Tih Lai

Min-Tih Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11652031
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a substrate an elastomer coupled to the substrate and a plurality of bondfingers on the elastomer. The substrate, the elastomer and the bondfingers are configured to cooperatively expand and retract.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Florence Pon, Yi Xu, Min-Tih Lai
  • Patent number: 10872880
    Abstract: BGA packages with a LGA package extension. First lands on a substrate are populated with solder balls, while only solder paste is dispensed on second lands that are surrounded by the first lands. Differences in solder stand-off may accommodate non-planarity in a package or the insertion of an LGA extension component, such as an IC or one or more discrete devices. Where an LGA extension component is attached to the second lands, solder paste may be further dispensed on third lands located on a package-side of the extension component. A BGA package is then attached to the first lands and third lands. The larger volume BGA solder connections maintaining mechanical reliability, particularly where the solder ball interconnects form a perimeter surrounding the low-volume solder interconnects.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: December 22, 2020
    Assignee: Intel Corporation
    Inventors: Tyler Leuten, Min-Tih Lai
  • Patent number: 10770429
    Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate, wherein a first microelectronic die within the microelectronic die stack includes an opening or “window” formed therethrough. The first microelectronic die may be in electronic communication with a second microelectronic die within microelectronic die stack and/or in electrical communication with a microelectronic substrate upon which the microelectronic die stack may be attached, wherein the electronic communication may be created with a bond wire which extends through the opening or “window” in the first microelectronic die.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: September 8, 2020
    Assignee: Intel Corporation
    Inventors: Min-Tih Lai, Cory A. Runyan
  • Patent number: 10748873
    Abstract: Substrates, assemblies, and techniques for enabling multi-chip flip chip packages are disclosed herein. For example, in some embodiments, a package substrate may include a first side face; a second side face, wherein the second side face is opposite to the first side face along an axis; a portion of insulating material extending from the first side face to the second side face; wherein a cross-section of the portion of insulating material taken perpendicular to the axis has a stairstep profile. Solder pads may be disposed at base and step surfaces of the portion of insulating material. One or more dies may be coupled to the package substrate (e.g., to form a multi-chip flip chip package), and in some embodiments, additional IC packages may be coupled to the package substrate. In some embodiments, the package substrate may be reciprocally symmetric or approximately reciprocally symmetric.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: August 18, 2020
    Assignee: Intel Corporation
    Inventors: Mao Guo, Min-Tih Lai, Tyler Charles Leuten
  • Publication number: 20200194344
    Abstract: A semiconductor structure is disclosed. The semiconductor structure includes a substrate an elastomer coupled to the substrate and a plurality of bondfingers on the elastomer. The substrate, the elastomer and the bondfingers are configured to cooperatively expand and retract.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 18, 2020
    Inventors: Florence PON, Yi XU, Min-Tih LAI
  • Patent number: 10573575
    Abstract: Embodiments of the present disclosure provide techniques and configurations for a semiconductor package with thermal fins, in accordance with some embodiments. In embodiments, a package assembly includes a die and a mold compound disposed on the die, to encapsulate the die. The package may further include a thermal solution including one or more thermal fins attached to the mold compound at their respective ends. The thermal fins may be disposed substantially flat on a top surface of the mold compound at a first temperature, and rise away from the top surface of the mold compound in response to a change of temperature to a second temperature, to reach an enclosure that surrounds the package assembly, to provide direct heat conductivity between the die and the enclosure. The second temperature may be greater than the first temperature. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Hyoung Il Kim, Florence Pon, Yi Xu, Yuhong Cai, Min-Tih Lai, Leo Craft
  • Publication number: 20190279954
    Abstract: A microelectronic device may be formed having at least one microelectronic die attached to a microelectronic substrate, wherein a ground shielding layer is formed over the microelectronic die and the microelectronic substrate. In one embodiment, both the microelectronic substrate and the first microelectronic die may have a signal bond pad and a ground bond pad. A bond wire may be used to form a connection between the microelectronic substrate signal bond pad and the first microelectronic die signal bond pad. A dielectric material layer may be formed on the microelectronic substrate and the first microelectronic die, and an electrically conductive material layer may be formed on the dielectric material layer, wherein the electrically conductive material layer extends through openings in the dielectric material layer to contact the microelectronic substrate ground bond pad and the first microelectronic die ground bond pad.
    Type: Application
    Filed: December 1, 2016
    Publication date: September 12, 2019
    Applicant: Intel Corporation
    Inventors: Min-Tih Lai, Florence Pon
  • Publication number: 20190244931
    Abstract: BGA packages with a LGA package extension. First lands on a substrate are populated with solder balls, while only solder paste is dispensed on second lands that are surrounded by the first lands. Differences in solder stand-off may accommodate non-planarity in a package or the insertion of an LGA extension component, such as an IC or one or more discrete devices. Where an LGA extension component is attached to the second lands, solder paste may be further dispensed on third lands located on a package-side of the extension component. A BGA package is then attached to the first lands and third lands. The larger volume BGA solder connections maintaining mechanical reliability, particularly where the solder ball interconnects form a perimeter surrounding the low-volume solder interconnects.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Applicant: Intel Corporation
    Inventors: Tyler LEUTEN, Min-Tih LAI
  • Publication number: 20190215970
    Abstract: Aspects of the embodiments are directed to an edge card assembled using surface mount technology (SMT). The edge card can be assembled by providing a printed circuit board comprising a first set of SMT pads proximate an edge of the printed circuit board to receive metal contact fingers and a second set of SMT pads to receive SMT components; placing a metal contact finger onto each of the first set of SMT pads; placing one or more SMT components onto at least some of the second set of SMT pads; providing a solder paste to the printed circuit board; and heating the printed circuit board to reflow the solder paste to mechanically and electrically connect the SMT components and the metal contact finger to the printed circuit board. The edge card can include a thin printed circuit board substrate.
    Type: Application
    Filed: September 25, 2016
    Publication date: July 11, 2019
    Applicant: Intel Corporation
    Inventor: Min-Tih Lai
  • Patent number: 10304799
    Abstract: BGA packages with a LGA package extension. First lands on a substrate are populated with solder balls, while only solder paste is dispensed on second lands that are surrounded by the first lands. Differences in solder stand-off may accommodate non-planarity in a package or the insertion of an LGA extension component, such as an IC or one or more discrete devices. Where an LGA extension component is attached to the second lands, solder paste may be further dispensed on third lands located on a package-side of the extension component. A BGA package is then attached to the first lands and third lands. The larger volume BGA solder connections maintaining mechanical reliability, particularly where the solder ball interconnects form a perimeter surrounding the low-volume solder interconnects.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: May 28, 2019
    Assignee: Intel Corporation
    Inventors: Tyler Leuten, Min-Tih Lai
  • Publication number: 20190139936
    Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate, wherein a first microelectronic die within the microelectronic die stack includes an opening or “window” formed therethrough. The first microelectronic die may be in electronic communication with a second microelectronic die within microelectronic die stack and/or in electrical communication with a microelectronic substrate upon which the microelectronic die stack may be attached, wherein the electronic communication may be created with a bond wire which extends through the opening or “window” in the first microelectronic die.
    Type: Application
    Filed: May 31, 2016
    Publication date: May 9, 2019
    Applicant: INTEL CORPORATION
    Inventors: Min-Tih Lai, Cory A. Runyan
  • Publication number: 20190067156
    Abstract: Embodiments of the present disclosure provide techniques and configurations for a semiconductor package with thermal fins, in accordance with some embodiments. In embodiments, a package assembly may comprise a die and a mold compound disposed on the die, to encapsulate the die. The package may further include a thermal solution comprising one or more thermal fins attached to the mold compound at their respective ends. The thermal fins may be disposed substantially flat on a top surface of the mold compound at a first temperature, and rise away from the top surface of the mold compound in response to a change of temperature to a second temperature, to reach an enclosure that surrounds the package assembly, to provide direct heat conductivity between the die and the enclosure. The second temperature may be greater than the first temperature. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: Hyoung Il Kim, Florence Pon, Yi Xu, Yuhong Cai, Min-Tih Lai, Leo Craft
  • Publication number: 20190035720
    Abstract: In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses for implementing a stress distribution interposer for mitigating substrate cracking. For instance, in accordance with one embodiment, there is an apparatus having therein: a substrate having electrical traces therein; a functional semiconductor die electrically interfaced to the electrical traces of the substrate; an interposer bonded at a bottom surface to the substrate and bonded at a top surface to the functional semiconductor die; and in which the interposer includes edges with a coefficient of thermal expansion and modulus which is between a coefficient of thermal expansion and modulus of the substrate and a coefficient of thermal expansion and modulus of the functional semiconductor die. Other related embodiments are disclosed.
    Type: Application
    Filed: April 1, 2016
    Publication date: January 31, 2019
    Applicant: Intel Corporation
    Inventors: Min-Tih LAI, Yuhong CAI
  • Patent number: 10122836
    Abstract: A handheld device may include a magnetic convection cooling system, which may include a fluid chamber that is in thermal communication with electronic circuitry of the handheld device. The fluid chamber may be closed and may contain a substantially non-gaseous first fluid and a substantially non-gaseous second fluid, wherein first fluid may include a magnetic property different from a magnetic property of second fluid. At least one electromagnet may be selectively activated to move the first and second fluids within the fluid chamber to provide convective cooling of the electronic circuitry.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: November 6, 2018
    Assignee: Intel Corporation
    Inventor: Min-Tih Lai
  • Publication number: 20180204821
    Abstract: Substrates, assemblies, and techniques for enabling multi-chip flip chip packages are disclosed herein. For example, in some embodiments, a package substrate may include a first side face; a second side face, wherein the second side face is opposite to the first side face along an axis; a portion of insulating material extending from the first side face to the second side face; wherein a cross-section of the portion of insulating material taken perpendicular to the axis has a stairstep profile. Solder pads may be disposed at base and step surfaces of the portion of insulating material. One or more dies may be coupled to the package substrate (e.g., to form a multi-chip flip chip package), and in some embodiments, additional IC packages may be coupled to the package substrate. In some embodiments, the package substrate may be reciprocally symmetric or approximately reciprocally symmetric.
    Type: Application
    Filed: September 23, 2015
    Publication date: July 19, 2018
    Applicant: Intel Corporation
    Inventors: Mao Guo, Min-Tih Lai, Tyler Charles Leuten
  • Publication number: 20180182735
    Abstract: BGA packages with a LGA package extension. First lands on a substrate are populated with solder balls, while only solder paste is dispensed on second lands that are surrounded by the first lands. Differences in solder stand-off may accommodate non-planarity in a package or the insertion of an LGA extension component, such as an IC or one or more discrete devices. Where an LGA extension component is attached to the second lands, solder paste may be further dispensed on third lands located on a package-side of the extension component. A BGA package is then attached to the first lands and third lands. The larger volume BGA solder connections maintaining mechanical reliability, particularly where the solder ball interconnects form a perimeter surrounding the low-volume solder interconnects.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Inventors: Tyler LEUTEN, Min-Tih LAI
  • Publication number: 20180088628
    Abstract: Aspects of the disclosure are directed to a printed circuit board and methods of making a printed circuit board. A printed circuit board strip can include a plurality of finger pads to receive metal contact fingers. The printed circuit board strip can also include a plurality of surface mount technology (SMT) solder pads on each of the printed circuit boards. One or more integrated circuit packages can be placed using SMT or pick-and-place techniques or similar techniques onto at least some of the SMT solder pads. The printed circuit board strip can also include a leadframe comprising metal contact fingers on the plurality of finger pads. The one or more integrated circuit packages and the leadframe comprising the metal contact fingers can be mechanically and electrically connected to printed circuit board strip through a solder process, such as that used in SMT or pick-and-place package assembly.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 29, 2018
    Applicant: Intel Corporation
    Inventor: Min-Tih Lai
  • Publication number: 20180087849
    Abstract: A handheld device may include a magnetic convection cooling system, which may include a fluid chamber that is in thermal communication with electronic circuitry of the handheld device. The fluid chamber may be closed and may contain a substantially non-gaseous first fluid and a substantially non-gaseous second fluid, wherein first fluid may include a magnetic property different from a magnetic property of second fluid. At least one electromagnet may be selectively activated to move the first and second fluids within the fluid chamber to provide convective cooling of the electronic circuitry.
    Type: Application
    Filed: September 28, 2016
    Publication date: March 29, 2018
    Inventor: Min-Tih Lai