Patents by Inventor Min-Tih Ted Lai

Min-Tih Ted Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DIE STACK WITH CASCADE AND VERTICAL CONNECTIONS
    Publication number: 20220037291
    Abstract: An electronic assembly includes a plurality of electronic die arranged into shingles, each shingle having a multiple offset stacked die coupled by cascading connections. Each shingle is arranged in a stack of shingles with alternate shingles having die stacked in opposite directions and offset in a zigzag manner to facilitate vertical electrical connections from a top of the electronic assembly to a bottom die of each shingle.
    Type: Application
    Filed: October 15, 2021
    Publication date: February 3, 2022
    Inventors: Min-Tih Ted Lai, Florence R. Pon, Yuhong Cai, John G. Meyers
  • Die stack with cascade and vertical connections
    Patent number: 11171114
    Abstract: An electronic assembly includes a plurality of electronic die arranged into shingles, each shingle having a multiple offset stacked die coupled by cascading connections. Each shingle is arranged in a stack of shingles with alternate shingles having die stacked in opposite directions and offset in a zigzag manner to facilitate vertical electrical connections from a top of the electronic assembly to a bottom die of each shingle.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: November 9, 2021
    Assignee: Intel Corporation
    Inventors: Min-Tih Ted Lai, Florence R. Pon, Yuhong Cai, John G. Meyers
  • Post-grind die backside power delivery
    Patent number: 10910301
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: February 2, 2021
    Assignee: Intel Corporation
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon
  • Compact wirebonding in stacked-chip system in package, and methods of making same
    Patent number: 10847450
    Abstract: A bond-wire system including a wire bond that is deflected above a dielectric ridge at a die edge. The deflected wire bond allows for both a lowered Z-profile and a reduced X-Y footprint. The bond-wire system may include a stacked-die configuration where a stacked die is wire bonded and the stacked-die bond wire is deflected above a dielectric ridge at the stacked die edge.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: November 24, 2020
    Assignee: Intel Corporation
    Inventors: Saeed Shojaie, Hyoung Il Kim, Bilal Khalaf, Min-Tih Ted Lai
  • POST-GRIND DIE BACKSIDE POWER DELIVERY
    Publication number: 20200051903
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Application
    Filed: October 21, 2019
    Publication date: February 13, 2020
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon
  • Post-grind die backside power delivery
    Patent number: 10483198
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon
  • COMPACT WIREBONDING IN STACKED-CHIP SYSTEM IN PACKAGE, AND METHODS OF MAKING SAME
    Publication number: 20190181072
    Abstract: A bond-wire system including a wire bond that is deflected above a dielectric ridge at a die edge. The deflected wire bond allows for both a lowered Z-profile and a reduced X-Y footprint. The bond-wire system may include a stacked-die configuration where a stacked die is wire bonded and the stacked-die bond wire is deflected above a dielectric ridge at the stacked die edge.
    Type: Application
    Filed: September 28, 2016
    Publication date: June 13, 2019
    Inventors: Saeed SHOJAIE, Hyoung IL KIM, Bilal KHALAF, Min-Tih TED LAI
  • DIE STACK WITH CASCADE AND VERTICAL CONNECTIONS
    Publication number: 20180366441
    Abstract: An electronic assembly includes a plurality of electronic die arranged into shingles, each shingle having a multiple offset stacked die coupled by cascading connections. Each shingle is arranged in a stack of shingles with alternate shingles having die stacked in opposite directions and offset in a zigzag manner to facilitate vertical electrical connections from a top of the electronic assembly to a bottom die of each shingle.
    Type: Application
    Filed: December 2, 2015
    Publication date: December 20, 2018
    Inventors: Min-Tih Ted Lai, Florence R. Pon, Yuhong Cai, John G. Meyers
  • POST-GRIND DIE BACKSIDE POWER DELIVERY
    Publication number: 20180315699
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Application
    Filed: July 9, 2018
    Publication date: November 1, 2018
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon
  • Post-grind die backside power delivery
    Patent number: 10032707
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: July 24, 2018
    Assignee: Intel Corporation
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon
  • POST-GRIND DIE BACKSIDE POWER DELIVERY
    Publication number: 20180182699
    Abstract: Disclosed is a die. The die may include a material layer, a plurality of vias, and a plurality of metal channels. The material layer may have a top side and a backside. The top side may include a plurality of pad connections. The plurality of vias may extend through the material layer from the top side to the backside. The plurality of metal channels may be in contact with the backside. Each of the plurality of metal channels may be in electrical communication with at least one of the plurality of pad connections and at least one of the plurality of vias.
    Type: Application
    Filed: December 27, 2016
    Publication date: June 28, 2018
    Inventors: Min-Tih Ted Lai, Tyler Leuten, Florence R. Pon