Patents by Inventor Min Wee Low

Min Wee Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7875968
    Abstract: Leadframe for a semiconductor package and manufacturing from such leadframe including a plurality of connection leads supported in a frame. Die mounting plate is centrally located in the leadframe and is supported by a plurality of support leads which are electrically connected to the die mounting pad and extending in a direction outwardly therefrom towards the frame. Each support lead is formed with a connection pad portion and a down set link portion. Each connection pad portion is spaced from the die mounting plate and is connected to a conductive bonding ground wire from a semiconductor device mounted on the die mounting plate. Each down set link portion is electrically connected to the die mounting pad and supports the die mounting pad in a spaced arrangement from the connection leads. The connection pad portion and the down set link portion overlap, in the direction of extension of the support lead.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: January 25, 2011
    Assignee: Infineon Technologies AG
    Inventors: Wu Hu Li, Mohamad Yazid Wagiman, Min Wee Low
  • Patent number: 7732259
    Abstract: A method to assemble a non-leaded semiconductor package is disclosed. In one embodiment, a carrier tape is attached to a metal foil. A plurality of leadframes are formed in the metal foil, each leadframe including a die pad laterally surrounded by a plurality of contact leads. A semiconductor die, including an active surface with a plurality of die contact pads, is attached to each die attach pad and electrically connected to the leadframe by a plurality of bond wires connecting the die contact pads and the lead contact areas of the contact leads. A plurality of leadframes, each including a wire bonded semiconductor die, are encapsulated with mold material. The carrier tape is removed and the non-leaded semiconductor packages separated.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: June 8, 2010
    Assignee: Infineon Technologies AG
    Inventors: Min Wee Low, Tian Siang Yip
  • Publication number: 20080258276
    Abstract: A method to assemble a non-leaded semiconductor package (1) comprises the following steps. A carrier tape (13) is attached to a metal foil (12). A plurality of leadframes (3) is formed in the metal foil (12), each leadframe (3) comprising a die pad (4) laterally surrounded by a plurality of contact leads (5). A semiconductor die (2), including an active surface with a plurality of die contact pads (7), is attached to each die attach pad (4) and electrically connected to the leadframe (3) by a plurality of bond wires (9) connecting the die contact pads (7) and the lead contact areas (6) of the contact leads (5). A plurality of leadframes (3), each including a wire bonded semiconductor die, are encapsulated with mold material (10). The carrier tape (13) is removed and the non-leaded semiconductor packages (1) separated.
    Type: Application
    Filed: February 26, 2004
    Publication date: October 23, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Min Wee Low, Tian Siang Yip
  • Publication number: 20080128741
    Abstract: A leadframe for a semiconductor package and a semiconductor package manufactured from such a leadframe including a plurality of connection leads supported in a frame. A die mounting plate is centrally located in the leadframe and is supported by a plurality of support leads with each support lead electrically connected to the die mounting pad and extending in a direction outwardly therefrom towards the frame. Each support lead is formed with a connection pad portion and a down set link portion. Each connection pad portion is spaced from the die mounting plate and is designed for connection to a conductive bonding ground wire from a semiconductor device mounted on the die mounting plate. Each down set link portion is electrically connected to the die mounting pad and is arranged to support the die mounting pad in a spaced arrangement from the connection leads. The connection pad portion and the down set link portion overlap, in the direction of extension of the support lead.
    Type: Application
    Filed: February 5, 2008
    Publication date: June 5, 2008
    Inventors: Wu Hu Li, Mohamad Yazid Wagiman, Min Wee Low