Patents by Inventor Min-Yih Luo

Min-Yih Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9111754
    Abstract: Systems and methods for floating gate structures with high electrostatic discharge performance. In one embodiment, a semiconductor structure includes a floating gate device. The floating gate device includes an embedded diode characterized as having less temperature dependence than a Zener diode. The breakdown voltage of the embedded diode is greater than an operating voltage of an associated integrated circuit and a snapback trigger voltage of the embedded diode is lower than a breakdown voltage of the semiconductor structure.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: August 18, 2015
    Assignee: Vishay-Siliconix
    Inventors: Esin Kutlu Demirlioglu, Min-Yih Luo
  • Patent number: 8582258
    Abstract: An electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) that provides ESD protection during an ESD event is disclosed. The electrostatic discharge (ESD) protection circuit includes a first electrostatic discharge (ESD) protection component and a second electrostatic discharge (ESD) protection component coupled in series to the first electrostatic discharge (ESD) protection component. A snapback holding voltage of the electrostatic discharge protection circuit is greater than the operating voltage of the electrostatic discharge protection circuit and a snapback trigger voltage of the electrostatic discharge protection circuit is lower than an oxide breakdown voltage of said integrated circuit.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: November 12, 2013
    Assignee: Vishay-Siliconix
    Inventors: Min Yih Luo, Kyle Terrill, Chrisoph Werres
  • Patent number: 7583485
    Abstract: An electrostatic discharge (ESD) protection circuit for an integrated circuit (IC) that provides ESD protection during an ESD event is disclosed. The electrostatic discharge (ESD) protection circuit includes a first electrostatic discharge (ESD) protection component and a second electrostatic discharge (ESD) protection component coupled in series to the first electrostatic discharge (ESD) protection component. A snapback holding voltage of the electrostatic discharge protection circuit is greater than the operating voltage of the electrostatic discharge protection circuit and a snapback trigger voltage of the electrostatic discharge protection circuit is lower than an oxide breakdown voltage of said integrated circuit.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: September 1, 2009
    Assignee: Vishay-Siliconix
    Inventors: Min-Yih Luo, Kyle Terrill, Christoph Werren
  • Publication number: 20070236843
    Abstract: Systems and methods for floating gate structures with high electrostatic discharge performance. In one embodiment, a semiconductor structure includes a floating field gate device. The floating field gate device includes an embedded diode characterized as having less temperature dependence than a Zener diode. The breakdown voltage of the embedded diode is greater than an operating voltage of an associated integrated circuit and a snapback trigger voltage of the embedded diode is lower than a breakdown voltage of the semiconductor structure.
    Type: Application
    Filed: January 18, 2007
    Publication date: October 11, 2007
    Inventors: Esin Demirlioglu, Min-Yih Luo