Patents by Inventor Min Yoo
Min Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12638957Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system receives, via a network, data corresponding to at least one chat room; displays, based on the data and in a user interface of the instant messenger application, a chat room list; in response to receiving, via the user interface, a user input that indicates focus on a displayed portion of a first chat room, displays, via the user interface, chat room information that comprises metadata corresponding to the first chat room; and based on a determination that a focusing time for the displayed portion of the first chat room satisfies a threshold: displays, via the user interface and during display of the chat room information, a chat preview window corresponding to the first chat room; and displays, in the chat preview window, at least one chat communication occurred in the first chat room.Type: GrantFiled: December 4, 2023Date of Patent: May 26, 2026Assignee: KAKAO CORP.Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
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Patent number: 12627621Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system displays, in a user interface of an instant messenger application, a chatroom comprising a plurality of chat messages, receive, via the user interface, a first user input indicating a user selection of a chat section comprising one or more chat messages of the plurality of chat messages, receive, via the user interface, a second user input comprising an indication of one or more modifications to the chat section, wherein the one or more modifications comprise a modification to an output method of the chat section, generate a chat clip by generating, based on the modification to the output method, a modified version of the chat section, display, in the user interface, the chat clip, and cause a second computing device to display, in a second user interface of an instant messenger application, the chat clip.Type: GrantFiled: December 6, 2023Date of Patent: May 12, 2026Assignee: KAKAO CORP.Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
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Publication number: 20260076222Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: November 18, 2025Publication date: March 12, 2026Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 12500199Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: July 8, 2024Date of Patent: December 16, 2025Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Publication number: 20250006686Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: July 8, 2024Publication date: January 2, 2025Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 12033970Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: May 24, 2021Date of Patent: July 9, 2024Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Publication number: 20240187360Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system displays, in a user interface of an instant messenger application, a chatroom comprising a plurality of chat messages, receive, via the user interface, a first user input indicating a user selection of a chat section comprising one or more chat messages of the plurality of chat messages, receive, via the user interface, a second user input comprising an indication of one or more modifications to the chat section, wherein the one or more modifications comprise a modification to an output method of the chat section, generate a chat clip by generating, based on the modification to the output method, a modified version of the chat section, display, in the user interface, the chat clip, and cause a second computing device to display, in a second user interface of an instant messenger application, the chat clip.Type: ApplicationFiled: December 6, 2023Publication date: June 6, 2024Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
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Publication number: 20240184424Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system receives, via a network, data corresponding to at least one chat room; displays, based on the data and in a user interface of the instant messenger application, a chat room list; in response to receiving, via the user interface, a user input that indicates focus on a displayed portion of a first chat room, displays, via the user interface, chat room information that comprises metadata corresponding to the first chat room; and based on a determination that a focusing time for the displayed portion of the first chat room satisfies a threshold: displays, via the user interface and during display of the chat room information, a chat preview window corresponding to the first chat room; and displays, in the chat preview window, at least one chat communication occurred in the first chat room.Type: ApplicationFiled: December 4, 2023Publication date: June 6, 2024Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
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Publication number: 20210398930Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: May 24, 2021Publication date: December 23, 2021Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 11018107Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: May 20, 2019Date of Patent: May 25, 2021Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Publication number: 20200051944Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: May 20, 2019Publication date: February 13, 2020Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 10340244Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: GrantFiled: December 19, 2017Date of Patent: July 2, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 10242956Abstract: A semiconductor device is disclosed that may include a first semiconductor die comprising a copper pillar, a second semiconductor die comprising a copper pillar, and a conductive bump connecting the copper pillar of the first semiconductor die to the copper pillar of the second semiconductor die. The first semiconductor die may comprise a metal dam formed between the copper pillar and a bond pad on the first semiconductor die. The conductive bump may have a melting point lower than melting points of the copper pillar of the first semiconductor die and the copper pillar of the second semiconductor die. The first semiconductor die may be coupled to a substrate with a conductive wire coupled to the bond pad and to the substrate. The first semiconductor die may comprise a redistribution layer formed beneath the copper pillar on the first semiconductor die.Type: GrantFiled: May 14, 2013Date of Patent: March 26, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Dong Hee Lee, Min Yoo, Dae Byoung Kang, Bae Yong Kim
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Publication number: 20180211929Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.Type: ApplicationFiled: December 19, 2017Publication date: July 26, 2018Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
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Patent number: 8441123Abstract: A semiconductor device has a first semiconductor die having at least one metal pillar formed along an inner perimeter and at least one bond pad formed along an outer perimeter. A second semiconductor die has at least one metal pillar. A conductive bump connects the at least one metal pillar of the first semiconductor die to the at least one metal pillar of the second semiconductor die. At least one metal dam is formed on the first semiconductor die between the at least one metal pillar of the first semiconductor die and the at least one bond pad.Type: GrantFiled: August 13, 2009Date of Patent: May 14, 2013Assignee: Amkor Technology, Inc.Inventors: Dong Hee Lee, Min Yoo, Dae Byoung Kang, Bae Yong Kim
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Patent number: 8294276Abstract: A semiconductor device and a fabricating method thereof are provided. In one exemplary embodiment, a plurality of semiconductor dies are mounted on a laminating member, for example, a copper clad lamination, having previously formed conductive patterns, followed by performing operations of encapsulating, forming conductive vias, forming a solder resist and sawing, thereby fabricating a chip size package in a simplified manner. Fiducial patterns are further formed on the laminating member, thereby accurately positioning the semiconductor dies at preset positions of the laminating member.Type: GrantFiled: May 27, 2010Date of Patent: October 23, 2012Assignee: Amkor Technology, Inc.Inventors: Sang Won Kim, Boo Yang Jung, Sung Kyu Kim, Min Yoo, Seung Jae Lee
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Patent number: 8089148Abstract: A circuit board has an insulative layer including a first surface and a second surface opposite to the first surface. A plurality of electrically conductive patterns is formed on the first surface of the insulative layer. Conductive lands are formed in a die mounting region of the first surface of the insulative layer and electrically connected to one of the plurality of conductive patterns on the first surface. An extending pattern extends from the conductive lands to outside of the mounting region. A protective layer covers the first surface of the insulative layer and the electrically conductive patterns. A trench is formed in the protective layer to expose the conductive lands and the extending patterns.Type: GrantFiled: August 11, 2009Date of Patent: January 3, 2012Assignee: Amkor Technology, Inc.Inventors: Jun Su Lee, Min Jae Lee, Jae Dong Kim, Jae Jin Lee, Min Yoo, Byung Jun Kim
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Patent number: 8004078Abstract: Provided is an adhesive composition for a semiconductor device. For example, the adhesive composition comprises a binder resin and a silicon carbide filler. The silicon carbide filler has relatively high thermal conductivity and a relatively low coefficient of thermal expansion (CTE). Accordingly, the adhesive composition containing the silicon carbide filler exhibits improved heat dissipation performance and electrical performance due to high thermal conductivity and shows inhibition of delamination or cracking of semiconductor devices due to low CTE. The silicon carbide has high thermal conductivity, but is electrically non-conductive. Therefore, an electrically conductive adhesive can be obtained by additional incorporation of a silver (Ag) filler into the binder resin.Type: GrantFiled: March 17, 2009Date of Patent: August 23, 2011Assignee: Amkor Technology, Inc.Inventors: Jae Kyu Song, Bong Chan Kim, Min Yoo
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Patent number: D1030644Type: GrantFiled: April 27, 2022Date of Patent: June 11, 2024Assignee: EV Mode LLCInventors: Jibong Jang, Min Yoo
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Patent number: D1030645Type: GrantFiled: April 27, 2022Date of Patent: June 11, 2024Assignee: EV Mode LLCInventors: Jibong Jang, Min Yoo