Patents by Inventor Min Yoo

Min Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12638957
    Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system receives, via a network, data corresponding to at least one chat room; displays, based on the data and in a user interface of the instant messenger application, a chat room list; in response to receiving, via the user interface, a user input that indicates focus on a displayed portion of a first chat room, displays, via the user interface, chat room information that comprises metadata corresponding to the first chat room; and based on a determination that a focusing time for the displayed portion of the first chat room satisfies a threshold: displays, via the user interface and during display of the chat room information, a chat preview window corresponding to the first chat room; and displays, in the chat preview window, at least one chat communication occurred in the first chat room.
    Type: Grant
    Filed: December 4, 2023
    Date of Patent: May 26, 2026
    Assignee: KAKAO CORP.
    Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
  • Patent number: 12627621
    Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system displays, in a user interface of an instant messenger application, a chatroom comprising a plurality of chat messages, receive, via the user interface, a first user input indicating a user selection of a chat section comprising one or more chat messages of the plurality of chat messages, receive, via the user interface, a second user input comprising an indication of one or more modifications to the chat section, wherein the one or more modifications comprise a modification to an output method of the chat section, generate a chat clip by generating, based on the modification to the output method, a modified version of the chat section, display, in the user interface, the chat clip, and cause a second computing device to display, in a second user interface of an instant messenger application, the chat clip.
    Type: Grant
    Filed: December 6, 2023
    Date of Patent: May 12, 2026
    Assignee: KAKAO CORP.
    Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
  • Publication number: 20260076222
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: November 18, 2025
    Publication date: March 12, 2026
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 12500199
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Grant
    Filed: July 8, 2024
    Date of Patent: December 16, 2025
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Publication number: 20250006686
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: July 8, 2024
    Publication date: January 2, 2025
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 12033970
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: July 9, 2024
    Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Publication number: 20240187360
    Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system displays, in a user interface of an instant messenger application, a chatroom comprising a plurality of chat messages, receive, via the user interface, a first user input indicating a user selection of a chat section comprising one or more chat messages of the plurality of chat messages, receive, via the user interface, a second user input comprising an indication of one or more modifications to the chat section, wherein the one or more modifications comprise a modification to an output method of the chat section, generate a chat clip by generating, based on the modification to the output method, a modified version of the chat section, display, in the user interface, the chat clip, and cause a second computing device to display, in a second user interface of an instant messenger application, the chat clip.
    Type: Application
    Filed: December 6, 2023
    Publication date: June 6, 2024
    Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
  • Publication number: 20240184424
    Abstract: A communication system using user interfaces for executing the instant messenger is provided. The system receives, via a network, data corresponding to at least one chat room; displays, based on the data and in a user interface of the instant messenger application, a chat room list; in response to receiving, via the user interface, a user input that indicates focus on a displayed portion of a first chat room, displays, via the user interface, chat room information that comprises metadata corresponding to the first chat room; and based on a determination that a focusing time for the displayed portion of the first chat room satisfies a threshold: displays, via the user interface and during display of the chat room information, a chat preview window corresponding to the first chat room; and displays, in the chat preview window, at least one chat communication occurred in the first chat room.
    Type: Application
    Filed: December 4, 2023
    Publication date: June 6, 2024
    Inventors: Yong Yeon Kim, Min Yoo, Hyun Seok Yoo
  • Publication number: 20210398930
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: May 24, 2021
    Publication date: December 23, 2021
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 11018107
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: May 25, 2021
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Publication number: 20200051944
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: May 20, 2019
    Publication date: February 13, 2020
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 10340244
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: July 2, 2019
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 10242956
    Abstract: A semiconductor device is disclosed that may include a first semiconductor die comprising a copper pillar, a second semiconductor die comprising a copper pillar, and a conductive bump connecting the copper pillar of the first semiconductor die to the copper pillar of the second semiconductor die. The first semiconductor die may comprise a metal dam formed between the copper pillar and a bond pad on the first semiconductor die. The conductive bump may have a melting point lower than melting points of the copper pillar of the first semiconductor die and the copper pillar of the second semiconductor die. The first semiconductor die may be coupled to a substrate with a conductive wire coupled to the bond pad and to the substrate. The first semiconductor die may comprise a redistribution layer formed beneath the copper pillar on the first semiconductor die.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: March 26, 2019
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Dong Hee Lee, Min Yoo, Dae Byoung Kang, Bae Yong Kim
  • Publication number: 20180211929
    Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.
    Type: Application
    Filed: December 19, 2017
    Publication date: July 26, 2018
    Inventors: Jae Hun Bae, Won Chul Do, Min Yoo, Young Rae Kim, Min Hwa Chang, Dong Hyun Kim, Ah Ra Jo, Seok Geun Ahn
  • Patent number: 8441123
    Abstract: A semiconductor device has a first semiconductor die having at least one metal pillar formed along an inner perimeter and at least one bond pad formed along an outer perimeter. A second semiconductor die has at least one metal pillar. A conductive bump connects the at least one metal pillar of the first semiconductor die to the at least one metal pillar of the second semiconductor die. At least one metal dam is formed on the first semiconductor die between the at least one metal pillar of the first semiconductor die and the at least one bond pad.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: May 14, 2013
    Assignee: Amkor Technology, Inc.
    Inventors: Dong Hee Lee, Min Yoo, Dae Byoung Kang, Bae Yong Kim
  • Patent number: 8294276
    Abstract: A semiconductor device and a fabricating method thereof are provided. In one exemplary embodiment, a plurality of semiconductor dies are mounted on a laminating member, for example, a copper clad lamination, having previously formed conductive patterns, followed by performing operations of encapsulating, forming conductive vias, forming a solder resist and sawing, thereby fabricating a chip size package in a simplified manner. Fiducial patterns are further formed on the laminating member, thereby accurately positioning the semiconductor dies at preset positions of the laminating member.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: October 23, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Sang Won Kim, Boo Yang Jung, Sung Kyu Kim, Min Yoo, Seung Jae Lee
  • Patent number: 8089148
    Abstract: A circuit board has an insulative layer including a first surface and a second surface opposite to the first surface. A plurality of electrically conductive patterns is formed on the first surface of the insulative layer. Conductive lands are formed in a die mounting region of the first surface of the insulative layer and electrically connected to one of the plurality of conductive patterns on the first surface. An extending pattern extends from the conductive lands to outside of the mounting region. A protective layer covers the first surface of the insulative layer and the electrically conductive patterns. A trench is formed in the protective layer to expose the conductive lands and the extending patterns.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: January 3, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Jun Su Lee, Min Jae Lee, Jae Dong Kim, Jae Jin Lee, Min Yoo, Byung Jun Kim
  • Patent number: 8004078
    Abstract: Provided is an adhesive composition for a semiconductor device. For example, the adhesive composition comprises a binder resin and a silicon carbide filler. The silicon carbide filler has relatively high thermal conductivity and a relatively low coefficient of thermal expansion (CTE). Accordingly, the adhesive composition containing the silicon carbide filler exhibits improved heat dissipation performance and electrical performance due to high thermal conductivity and shows inhibition of delamination or cracking of semiconductor devices due to low CTE. The silicon carbide has high thermal conductivity, but is electrically non-conductive. Therefore, an electrically conductive adhesive can be obtained by additional incorporation of a silver (Ag) filler into the binder resin.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: August 23, 2011
    Assignee: Amkor Technology, Inc.
    Inventors: Jae Kyu Song, Bong Chan Kim, Min Yoo
  • Patent number: D1030644
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: June 11, 2024
    Assignee: EV Mode LLC
    Inventors: Jibong Jang, Min Yoo
  • Patent number: D1030645
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: June 11, 2024
    Assignee: EV Mode LLC
    Inventors: Jibong Jang, Min Yoo