Patents by Inventor Min-Yung KO

Min-Yung KO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240021430
    Abstract: A work piece is positioned on a work piece support, which includes a plurality of temperature control zones. A pre-etch surface topography is determined by measuring a plurality of pre-etch surface heights or thicknesses at a plurality of sites on the work piece. The plurality of sites correspond to the plurality of temperature control zones on the work piece support. At least a first zone of the temperature control zones is heated or cooled based on the measured plurality of pre-etch surface heights or thicknesses, so that the first zone has a first temperature different from a second temperature of a second zone of the temperature control zones. A dry etch is carried out while the first zone has the first temperature different from the second temperature of the second zone of the temperature control zones.
    Type: Application
    Filed: August 7, 2023
    Publication date: January 18, 2024
    Inventors: Ming Chyi Liu, Hung-Wen Hsu, Min-Yung Ko
  • Publication number: 20230363285
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a memory cell. In some embodiments, a memory film is deposited over a substrate and comprises a bottom electrode layer, a top electrode layer, and a data storage film between the top and bottom electrode layers. A hard mask film is deposited over the memory film and comprises a conductive hard mask layer. The top electrode layer and the hard mask film are patterned to respectively form a top electrode and a hard mask over the top electrode. A trimming process is performed to decrease a sidewall angle between a sidewall of the hard mask and a bottom surface of the hard mask. An etch is performed into the data storage film with the hard mask in place after the trimming process to form a data storage structure underlying the top electrode.
    Type: Application
    Filed: July 17, 2023
    Publication date: November 9, 2023
    Inventors: Min-Yung Ko, Chern-Yow Hsu, Chang-Ming Wu, Shih-Chang Liu
  • Patent number: 11765980
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a memory cell. In some embodiments, a memory film is deposited over a substrate and comprises a bottom electrode layer, a top electrode layer, and a data storage film between the top and bottom electrode layers. A hard mask film is deposited over the memory film and comprises a conductive hard mask layer. The top electrode layer and the hard mask film are patterned to respectively form a top electrode and a hard mask over the top electrode. A trimming process is performed to decrease a sidewall angle between a sidewall of the hard mask and a bottom surface of the hard mask. An etch is performed into the data storage film with the hard mask in place after the trimming process to form a data storage structure underlying the top electrode.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Yung Ko, Chern-Yow Hsu, Chang-Ming Wu, Shih-Chang Liu
  • Publication number: 20220223425
    Abstract: A work piece is positioned on a work piece support, which includes a plurality of temperature control zones. A pre-etch surface topography is determined by measuring a plurality of pre-etch surface heights or thicknesses at a plurality of sites on the work piece. The plurality of sites correspond to the plurality of temperature control zones on the work piece support. At least a first zone of the temperature control zones is heated or cooled based on the measured plurality of pre-etch surface heights or thicknesses, so that the first zone has a first temperature different from a second temperature of a second zone of the temperature control zones. A dry etch is carried out while the first zone has the first temperature different from the second temperature of the second zone of the temperature control zones.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 14, 2022
    Inventors: Ming Chyi Liu, Hung-Wen Hsu, Min-Yung Ko
  • Patent number: 11289539
    Abstract: Pillar stacks of a top electrode and a hard mask portion are formed over a layer stack containing a continuous reference magnetization layer, a continuous nonmagnetic tunnel barrier layer, and a continuous free magnetization layer. A continuous dielectric liner may be deposited and anisotropically etched to form inner dielectric spacers. The continuous free magnetization layer, the continuous nonmagnetic tunnel barrier layer, and the continuous reference magnetization layer may be anisotropically etched to form vertical stacks of a respective reference magnetization layer, a respective nonmagnetic tunnel barrier layer, and a respective free magnetization layer, which are magnetic tunnel junctions. The inner dielectric spacers prevent redeposition of a metallic material of the hard mask portions on sidewalls of the magnetic tunnel junctions. The hard mask portions may be removed, and a metallic cell contact structures may be formed on top of each top electrode.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Yung Ko, Shih-Chang Liu
  • Publication number: 20220069204
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a memory cell. In some embodiments, a memory film is deposited over a substrate and comprises a bottom electrode layer, a top electrode layer, and a data storage film between the top and bottom electrode layers. A hard mask film is deposited over the memory film and comprises a conductive hard mask layer. The top electrode layer and the hard mask film are patterned to respectively form a top electrode and a hard mask over the top electrode. A trimming process is performed to decrease a sidewall angle between a sidewall of the hard mask and a bottom surface of the hard mask. An etch is performed into the data storage film with the hard mask in place after the trimming process to form a data storage structure underlying the top electrode.
    Type: Application
    Filed: October 23, 2020
    Publication date: March 3, 2022
    Inventors: Min-Yung Ko, Chern-Yow Hsu, Chang-Ming Wu, Shih-Chang Liu
  • Publication number: 20220020917
    Abstract: A magnetic tunnel junction device includes a pillar structure including, from bottom to top, a bottom electrode and a magnetic tunnel junction structure, a top electrode overlying the magnetic tunnel junction structure, and a dielectric metal oxide layer extending from a sidewall of the pillar structure to a sidewall of the top electrode. The magnetic tunnel junction structure contains a reference magnetization layer including a first ferromagnetic material, a tunnel barrier layer, and a free magnetization layer including a second ferromagnetic material. The top electrode includes a metallic material containing a nonmagnetic metal element. The dielectric metal oxide layer may be formed by performing an oxidation process that oxidizes a residual metal film after a focused ion beam etch process, and eliminates conductive paths from surfaces of the pillar structure.
    Type: Application
    Filed: May 18, 2021
    Publication date: January 20, 2022
    Inventors: Hung-Yu CHANG, Min-Yung KO
  • Publication number: 20210375988
    Abstract: Pillar stacks of a top electrode and a hard mask portion are formed over a layer stack containing a continuous reference magnetization layer, a continuous nonmagnetic tunnel barrier layer, and a continuous free magnetization layer. A continuous dielectric liner may be deposited and anisotropically etched to form inner dielectric spacers. The continuous free magnetization layer, the continuous nonmagnetic tunnel barrier layer, and the continuous reference magnetization layer may be anisotropically etched to form vertical stacks of a respective reference magnetization layer, a respective nonmagnetic tunnel barrier layer, and a respective free magnetization layer, which are magnetic tunnel junctions. The inner dielectric spacers prevent redeposition of a metallic material of the hard mask portions on sidewalls of the magnetic tunnel junctions. The hard mask portions may be removed, and a metallic cell contact structures may be formed on top of each top electrode.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Inventors: Min-Yung KO, Shih-Chang LIU