Abstract: A semiconductor device and a corresponding circuit for shunting current in a circuit protection configuration is disclosed. An example device includes a first semiconductor region having an anode electrical contact, a second semiconductor region having a cathode electrical contact, a third semiconductor region extending between the first semiconductor region and the second semiconductor region, the second semiconductor region and the third semiconductor region forming a PN junction therebetween, and a gate coupled to the third semiconductor region. The gate is controllable between a first mode in which additional space charges are induced in the semiconductor region to deplete the semiconductor region, and a second mode in which additional space charges are not induced in the semiconductor region.