Patents by Inventor Minakshisundaran B. Anand

Minakshisundaran B. Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220261059
    Abstract: The present invention provides a system for observing power or energy availability for a gateway device and the power or energy consumption of each component or device within or connected to the gateway device. The gateway device of the present invention can then learn the usage patterns of the software modules and devices and then predict the power utilization based on various usage plans. The gateway device can then plan or build an energy consumption schema and implement the energy consumption schema to control power utilization by the gateway device and its related peripheral devices. The gateway device can also communicate with other gateway devices to share power plant data, utilization schemas, or to off load or on board data tasks. The gateway device can dynamically self-optimize to restrict or permit power plant usage based on forecasts derived from past behavior and predicted future behavior and demand predictions triggered by application usage.
    Type: Application
    Filed: February 7, 2022
    Publication date: August 18, 2022
    Inventors: Stanislav Rostislavovych Bobovych, Tzeta Tsao, Minakshisundaran B. Anand, Tim Winter
  • Patent number: 8271937
    Abstract: An application software generator automatically generates an application software unit. The application software generator includes an application composer that combines components extracted from a component repository with an application framework to generate the application software unit. Each component in the component repository includes a component shell, a component interface and a component core. The application framework includes configurable parameters that determine how the application software unit is generated and operates. The configurable parameters can be entered by a user using a graphical user interface. The user can be assisted using a wizard format. The application framework also provides connectivity between components so that they can pass messages to one another. The connectivity can be, for example, by a message bus or event registry and event dispatch. Components themselves can be automatically generated using the application software generator.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: September 18, 2012
    Assignee: Cooper Technologies Company
    Inventors: Minakshisundaran B. Anand, Rajesh Thakkar, Prakash R. Chakravarthi
  • Patent number: 7346891
    Abstract: An application software generator automatically generates an application software unit. The application software generator includes an application composer that combines components extracted from a component repository with an application framework to generate the application software unit. Each component in the component repository includes a component shell, a component interface and a component core. The application framework includes configurable parameters that determine how the application software unit is generated and operates. The configurable parameters can be entered by a user using a graphical user interface. The user can be assisted using a wizard format. The application framework also provides connectivity between components so that they can pass messages to one another. The connectivity can be, for example, by a message bus or event registry and event dispatch. Components themselves can be automatically generated using the application software generator.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: March 18, 2008
    Assignee: EKA Systems Inc.
    Inventors: Minakshisundaran B. Anand, Rajesh Thakkar, Prakash R. Chakravarthi
  • Patent number: 7093206
    Abstract: A computer aided design (CAD) system. A template generation engine generates templates from interconnect configuration files. A field solver generates high frequency passive element relationships from the templates. A circuit builder generates circuit description files from device technology models and from high frequency passive element relationships. Parameterized circuit description models may be generated for large range of sensitivity analyses. A simulator simulates circuit responses for transmission line models from the circuit description files. Interconnect configuration files may be generated by a geometry and material definition module that receives process description data from a designer.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: August 15, 2006
    Assignee: International Business Machines Corp.
    Inventors: Minakshisundaran B. Anand, Matthew S. Angyal, Alina Deutsch, Ibrahim M. Elfadel, Gerard V. Kopcsay, Barry J. Rubin, Howard H. Smith
  • Patent number: 7035207
    Abstract: A network comprises a plurality of network nodes. Each network node has a unique node identifier within the context of the network and stores a table of nodes. The table of nodes includes at least one table entry. The table entry includes three fields—a destination node field, a next node field and a cost field. The destination field is a unique node identifier corresponding to another node in the network. The next node is a unique node identifier corresponding to the next node in the communication path to the destination node. The cost field is the cost associated with communication with the network node. When a node is added to the network, it detects the presence of adjacent nodes. The new node obtains the table of nodes stored in each adjacent node and uses the information contained in the node tables to updates its own node table, thereby obtaining information for communicating with every other node in the network.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: April 25, 2006
    Assignee: EKA Systems, Inc
    Inventors: Timothy Clark Winter, Minakshisundaran B. Anand, Prakash R. Chakravarthi
  • Patent number: 6734096
    Abstract: A method is described for forming a metal pattern in a low-dielectric constant substrate. A hardmask is prepared which includes a low-k lower hardmask layer and a top hardmask layer. The top hardmask layer is a sacrificial layer with a thickness of about 200 Å, preferably formed of a refractory nitride, and which serves as a stopping layer in a subsequent CMP metal removal process. The patterning is performed using resist layers. Oxidation damage to the lower hardmask layer is avoided by forming a protective layer in the hardmask, or by using a non-oxidizing resist strip process.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: May 11, 2004
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Dalton, Minakshisundaran B. Anand, Michael D. Armacost, Shyng-Tsong Chen, Stephen M. Gates, Stephen E. Greco, Simon M. Karecki, Satyanarayana V. Nitta
  • Publication number: 20040008691
    Abstract: A network comprises a plurality of network nodes. Each network node has a unique node identifier within the context of the network and stores a table of nodes. The table of nodes includes at least one table entry. The table entry includes three fields—a destination node field, a next node field and a cost field. The destination field is a unique node identifier corresponding to another node in the network. The next node is a unique node identifier corresponding to the next node in the communication path to the destination node. The cost field is the cost associated with communication with the network node. When a node is added to the network, it detects the presence of adjacent nodes. The new node obtains the table of nodes stored in each adjacent node and uses the information contained in the node tables to updates its own node table, thereby obtaining information for communicating with every other node in the network.
    Type: Application
    Filed: June 5, 2002
    Publication date: January 15, 2004
    Inventors: Timothy Clark Winter, Minakshisundaran B. Anand, Prakash R. Chakravarthi
  • Publication number: 20040006761
    Abstract: An application software generator automatically generates an application software unit. The application software generator includes an application composer that combines components extracted from a component repository with an application framework to generate the application software unit. Each component in the component repository includes a component shell, a component interface and a component core. The application framework includes configurable parameters that determine how the application software unit is generated and operates. The configurable parameters can be entered by a user using a graphical user interface. The user can be assisted using a wizard format. The application framework also provides connectivity between components so that they can pass messages to one another. The connectivity can be, for example, by a message bus or event registry and event dispatch. Components themselves can be automatically generated using the application software generator.
    Type: Application
    Filed: July 5, 2002
    Publication date: January 8, 2004
    Inventors: Minakshisundaran B. Anand, Rajesh Thakkar, Prakash R. Chakravarthi
  • Publication number: 20030134505
    Abstract: A method is described for forming a metal pattern in a low-dielectric constant substrate. A hardmask is prepared which includes a low-k lower hardmask layer and a top hardmask layer. The top hardmask layer is a sacrificial layer with a thickness of about 200 Å, preferably formed of a refractory nitride, and which serves as a stopping layer in a subsequent CMP metal removal process. The patterning is performed using resist layers. Oxidation damage to the lower hardmask layer is avoided by forming a protective layer in the hardmask, or by using a non-oxidizing resist strip process.
    Type: Application
    Filed: January 17, 2002
    Publication date: July 17, 2003
    Applicant: International Business Machines Corporation
    Inventors: Timothy J. Dalton, Minakshisundaran B. Anand, Michael D. Armacost, Shyng-Tsong Chen, Stephen M. Gates, Stephen E. Greco, Simon M. Karecki, Satyanarayana V. Nitta, Anna Karecki
  • Publication number: 20010013657
    Abstract: In the present invention, the bonding pad is formed in a lattice-like shape. Directly underneath the passivation layer, the etching stopper layer is provided. An opening is made through the passivation layer and the etching stopper layer so as to expose the bonding pad. The cavity sections of the lattice-like shape of the bonding pad are filled with the insulating layer. The bonding wire is connected to the lattice-shaped bonding pad. With this structure, the bonding error of the device manufactured by the damascening process can be avoided.
    Type: Application
    Filed: August 20, 1997
    Publication date: August 16, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: MINAKSHISUNDARAN B. ANAND