Patents by Inventor Minami Takeuchi

Minami Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6236069
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: May 22, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 5793065
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 11, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 5464994
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: August 16, 1994
    Date of Patent: November 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 5381026
    Abstract: Disclosed herein is an insulated-gate thyristor comprising a base layer of a first conductivity type, having first and second major surfaces, a first main-electrode region of the first conductivity type, formed in the first major surface of the base layer, a second main-electrode region of a second conductivity type, formed in the second major surface of the base layer, at least a pair of grooves extending from the first main-electrode region into the base layer, and opposing each other and spaced apart by a predetermined distance, insulated gate electrodes formed within the grooves, and a turn-off insulated-gate transistor structure for releasing carriers of the second conductivity type from the base layer.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: January 10, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Shinohe, Kazuya Nakayama, Minami Takeuchi, Masakazu Yamaguchi, Mitsuhiko Kitagawa, Ichiro Omura, Akio Nakagawa
  • Patent number: 5089719
    Abstract: A drive circuit for a voltage-controlled type semiconductor device is provided which comprises ON gate drive circuit for supplying an ON control signal to a control electrode of the semiconductor device which performs a current switching, OFF gate drive circuit for supplying an OFF control signal to the control electrode of the semiconductor device, high voltage power source, connected to at least one of the ON gate drive circuit and OFF gate drive circuit, for supplying a control current of a predetermined current increase rate to the control electrode of the semiconductor device through at least one of the ON gate drive circuit and OFF gate drive circuit, low voltage power source, provided in juxtaposition with the high voltage power source, for supplying, to the control electrode, enough control current to hold the semiconductor device in a normal state, and switch for supplying an output of the high voltage power source to the control electrode in an earlier portion of a turn ON or a turn OFF period, and
    Type: Grant
    Filed: September 25, 1990
    Date of Patent: February 18, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshio Kamei, Minami Takeuchi
  • Patent number: 4609937
    Abstract: A power semiconductor device dispensed with soldering and useful for fork lifts and etc., wherein at least one O-ring is provided between the inner wall of case housing at least one semiconductor element structure and outer periphery of a member disposed on the semiconductor element structure inside said case so as to hermetically seal the semiconductor element structure from external atmosphere.
    Type: Grant
    Filed: April 26, 1985
    Date of Patent: September 2, 1986
    Inventors: Minami Takeuchi, Shuichi Otake
  • Patent number: 4392175
    Abstract: A protecting device includes a discriminating circuit and a protecting circuit. The GTO thyristor is operated in such a manner that a carrier storing is completed from a first time point at which the supply of a negative gate current is started to a second time point, an anode-cathode voltage increases from the second time point to a third time point and decreases from the third time point to a fourth time point, and increases again from the fourth time point. The discriminating circuit includes a circuit for obtaining an amount of change between the anode-cathode voltages at the third and fourth time points, a circuit for obtaining a ratio of the amount of change to the anode-cathode voltage at the third time point, and a comparing circuit for producing a control signal when the ratio is smaller than a given value. The protecting circuit, when receiving the control signal, stops the conduction of the GTO thyristor.
    Type: Grant
    Filed: December 2, 1980
    Date of Patent: July 5, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Katsuhiko Takigami, Minami Takeuchi
  • Patent number: 4357621
    Abstract: A reverse conducting thyristor includes a thyristor section, a diode section and a semiconductor separator section for electrically separating both the sections.
    Type: Grant
    Filed: October 29, 1979
    Date of Patent: November 2, 1982
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventor: Minami Takeuchi
  • Patent number: 4296427
    Abstract: A reverse conducting thyristor comprises a thyristor section, a diode section and a separator section. The three sections are integrally formed into a cylindrical body. The thyristor section is constituted by a first region of a first conductivity type, a second region of the second conductivity type, a third region of the first conductivity type, a main emitter region of the second conductivity type, a cathode electrode, an auxiliary emitter region, an auxiliary gate electrode and a main gate electrode.The first region is formed on a first electrode, the second region on the first region, and the third region on the second region. The main emitter region is so formed in the third region as to have its surface on the same level with that of the third region. The auxiliary emitter region is similarly formed in the third region and faces at least a part of that periphery of the main emitter region which does not contact the separator section. The cathode electrode is formed on the main emitter region.
    Type: Grant
    Filed: August 28, 1979
    Date of Patent: October 20, 1981
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Minami Takeuchi, Minoru Kuriki