Abstract: A memory system includes: a memory device including a plurality of memory blocks, and a controller configured to manage the plurality of memory blocks as N block groups, wherein the controller comprises: N operation cores, each configured to manage access to a corresponding block group by mapping a corresponding one of N physical address ranges corresponding to the N block groups to a corresponding one of N first logical address ranges, and a control core configured to manage a second logical address range shared with a host by dividing the second logical address range into N third logical address ranges that are sequential, and to manage access to the N operation cores by dynamically mapping the N third logical address ranges to the N first logical address ranges.

Abstract: A storage device may include a memory and a controller. The memory may include a plurality of memory blocks. The controller may set a plurality of super memory blocks, each including at least one of the plurality of memory blocks, may receive, from a host, a write command requesting writing of a plurality of data units, the write command including N tags, each tag indicating a super memory block to which at least one of the plurality of data units is to be written, and may write the plurality of data units to N target super memory blocks corresponding to the N tags, respectively, among the plurality of super memory blocks.

Abstract: The present invention provides a compound represented by chemical formula 1, an optical isomer thereof or a pharmaceutically acceptable salt thereof, and a pharmaceutical composition for preventing or treating Wnt/?-catenin signaling-associated diseases, comprising same.

Abstract: A memory storage device is capable of improving reliability of a memory system. The memory storage device comprises a memory controller, and a non-volatile memory connected to the memory controller. A method includes receiving, by the memory controller, a command from a host device, the command requesting lost LBA (logical block address) information resulting from a system shutdown of the memory storage device, in response to the command, providing, by the memory controller, the lost LBA information, and receiving, by the memory controller, recovered data corresponding to the lost LBA information, wherein the lost LBA information includes at least one of the number of LBAs lost by system shutdown, an LBA list lost by system shutdown, and deletion of a previous LBA list lost by system shutdown.

Abstract: A memory storage device is capable of improving reliability of a memory system. The memory storage device comprises a memory controller, and a non-volatile memory connected to the memory controller. A method includes receiving, by the memory controller, a command from a host device, the command requesting lost LBA (logical block address) information resulting from a system shutdown of the memory storage device, in response to the command, providing, by the memory controller, the lost LBA information, and receiving, by the memory controller, recovered data corresponding to the lost LBA information, wherein the lost LBA information includes at least one of the number of LBAs lost by system shutdown, an LBA list lost by system shutdown, and deletion of a previous LBA list lost by system shutdown.

Abstract: A nonvolatile memory system comprises a temporary power supply that supplies power in the event of an unexpected power interruption. The temporary power supply provides power while metadata stored in one or more buffers is compressed and transferred to a nonvolatile memory device.

Abstract: The method of operating the data storage device includes performing channel distribution non-sequentially based on a logical address included in a data signal and outputting a channel address, and at least one of writing data to and reading stored data from a memory connected to one of a plurality of channels based on the channel address.

Abstract: A nonvolatile memory system comprises a temporary power supply that supplies power in the event of an unexpected power interruption. The temporary power supply provides power while metadata stored in one or more buffers is compressed and transferred to a nonvolatile memory device.

Abstract: A data storage device includes a flash memory including a plurality of data blocks and a flash translation layer that divides the plurality of data blocks into a data block of a first group and a data block of a second group, and that records the data signal to a data block of the first group or a data block of the second group which is extended from a data block of the first group.

Abstract: A nonvolatile memory system comprises a temporary power supply that supplies power in the event of an unexpected power interruption. The temporary power supply provides power while metadata stored in one or more buffers is compressed and transferred to a nonvolatile memory device.

Abstract: The non-volatile random access memory (RAM) includes a non-volatile RAM array, a buffer configured to buffer data to be programmed in the non-volatile RAM array and configured to buffer data read from the non-volatile RAM array, and a control block configured to read data from at least one of the non-volatile RAM array and the buffer based on whether the data to be read has been stored in the buffer, a temperature when the data was programmed, and a time lapse since the programming of the data.

Abstract: A nonvolatile memory system comprises a temporary power supply that supplies power in the event of an unexpected power interruption. The temporary power supply provides power while metadata stored in one or more buffers is compressed and transferred to a nonvolatile memory device.

Abstract: The method of operating the data storage device includes performing channel distribution non-sequentially based on a logical address included in a data signal and outputting a channel address, and at least one of writing data to and reading stored data from a memory connected to one of a plurality of channels based on the channel address.

Abstract: A data storage device includes a flash memory including a plurality of data blocks and a flash translation layer that divides the plurality of data blocks into a data block of a first group and a data block of a second group, and that records the data signal to a data block of the first group or a data block of the second group which is extended from a data block of the first group.

Abstract: The non-volatile random access memory (RAM) includes a non-volatile RAM array, a buffer configured to buffer data to be programmed in the non-volatile RAM array and configured to buffer data read from the non-volatile RAM array, and a control block configured to read data from at least one of the non-volatile RAM array and the buffer based on whether the data to be read has been stored in the buffer, a temperature when the data was programmed, and a time lapse since the programming of the data.