Patents by Inventor Mineharu Tsukada
Mineharu Tsukada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050156216Abstract: After a step of fabricating a MOS transistor (14) on a semiconductor substrate (11) and further steps up to bury a W plug (24), an Ir film (25a), an IrOy film (25b), a PZT film (26), and an IrOx film (27) are formed sequentially over the entire surface. The composition of the PZT film (26) is such that the content of Pb exceeds that of Zr and that of Ti. After processing the Ir film (25a), the IrOy film (25b), the PZT film (26) and the IrOx film (27), annealing is effected to remedy the damage to the PZT film (26) that is caused when the IrOx film (27) is formed and to diffuse Ir in the IrOx film (27) into the PZT film (26). As a result, the Ir diffused into the PZT film (26) concentrates at an interface between the IrOx film (27) and the PZT film (26) and at grain boundaries in the PZT film (26), and the Ir concentrations at the interface and boundaries are higher than those in the grains.Type: ApplicationFiled: March 17, 2005Publication date: July 21, 2005Applicant: FUJITSU LIMITEDInventors: Jeffrey Cross, Mineharu Tsukada, John Baniecki, Kenji Nomura, Igor Stolichnov
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Publication number: 20040147047Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.Type: ApplicationFiled: November 20, 2003Publication date: July 29, 2004Inventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
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Publication number: 20030221496Abstract: After placing a sample in a heating vacuum chamber, a probe is climbed down to a position above a capacitor formed in the sample whose electrical characteristic is supposed to be measured. The probe is contacted with both electrodes of the capacitor, which is confirmed by electrical measurement. In order to measure capacitance loss, after filling N2 gas up in the heating vacuum chamber, a mixed gas is introduced from a line for 3 vol %H2+97 vol %N2 to the inside of the heating vacuum chamber. After pressure has been stabilized there, capacitance loss and lapsed time are measured at the same time. Concentrations of residual H2O and residual O2 in the heating vacuum chamber are measured by a quadrupole mass spectrometer QMS; and at the same time, concentrations of each of residual H2O and residual O2 in an exhaust gas are measured by sensors.Type: ApplicationFiled: May 15, 2003Publication date: December 4, 2003Applicant: FUJITSU LIMITEDInventors: Jeffrey S. Cross, Mineharu Tsukada
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Publication number: 20030169574Abstract: The present invention aims to provide an IC card, requiring no special additional devices, not causing a liquid leakage of an aqueous electrolyte, requiring no battery, and capable of displaying information easily and cheaply by internally generated electric power and remaining the information even after the voltage is stopped applying. An IC card of the present invention has an electric power generator capable of generating electric power by an external stimulus and a display driven by the generated electric power so as to display information. The IC card of the present invention preferably have aspects of that the electric power generator is a piezoelectric transducer, a nonvolatile memory for storing information displayed on the display is provide, the nonvolatile memory is a ferroelectric memory, the display is formed by an electrochromic display device, and the electrochromic display device is an all solid-state electrochromic display device.Type: ApplicationFiled: February 11, 2003Publication date: September 11, 2003Applicant: FUJITSU LIMITEDInventors: Kenji Maruyama, Mineharu Tsukada
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Patent number: 6555864Abstract: A ferroelectric capacitor includes a lower electrode, a ferroelectric capacitor insulation film formed on the lower electrode and an upper electrode formed on the ferroelectric capacitor insulation film, wherein the ferroelectric capacitor insulation film has a composition of PZT and contains an excess amount of Pb with respect to a stoichiometry of PZT.Type: GrantFiled: February 29, 2000Date of Patent: April 29, 2003Assignee: Fujitsu LimitedInventors: Jeffrey Scott Cross, Tsuyoshi Sakai, Mitsushi Fujiki, Mineharu Tsukada
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Publication number: 20020190293Abstract: A ferroelectric capacitor includes a lower electrode, a ferroelectric capacitor insulation film formed on the lower electrode and an upper electrode formed on the ferroelectric capacitor insulation film, wherein the ferroelectric capacitor insulation film has a composition of PZT and contains an excess amount of Pb with respect to a stoichiometry of PZT.Type: ApplicationFiled: June 7, 2002Publication date: December 19, 2002Applicant: Fujitsu LimitedInventors: Jeffrey Scott Cross, Tsuyoshi Sakai, Mitsushi Fujiki, Mineharu Tsukada
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Electronic device having perovskite-type oxide film, production thereof, and ferroelectric capacitor
Patent number: 6194228Abstract: A method of manufacturing an electronic device including an oxide film of perovskite-type, said method comprising the steps of forming on a base substrate a first conductive oxide film of perovskite type in an atmosphere of reduced pressure at a first temperature, and performing heat treatment on the first conductive oxide film in an oxidizing atmosphere containing oxygen at a second temperature which is higher than the first temperature.Type: GrantFiled: October 21, 1998Date of Patent: February 27, 2001Assignee: Fujitsu LimitedInventors: Mitsushi Fujiki, Jeffrey S. Cross, Mineharu Tsukada -
Patent number: 6156259Abstract: In a method of manufacturing piezoelectric ceramics by molding pre-fired or calcined powders of ingredients of a piezoelectric ceramic material and sintering the powder mold at a high pressure, the powder mold is pre-sintered at an atmospheric pressure before sintering at high pressure (HIP). Preferably, after the sintering HIP step, a thermal treatment is performed at a temperature of from 500 to 1000.degree. C. under an oxidizing atmosphere. For a Pb(Zn.sub.1/3 Nb.sub.2/3)O.sub.3 --PbTiO.sub.3 based piezoelectric ceramic, the composition is preferably set to (Pb.sub.1-x Ba.sub.x)[(Zn.sub.1/3 Nb.sub.2/3).sub.1-y Ti.sub.y ]O.sub.3, where 0.001<x<0.055 and 0.05<y<0.20.Type: GrantFiled: October 6, 1995Date of Patent: December 5, 2000Assignee: Fujitsu LimitedInventors: Motoyuki Nishizawa, Mineharu Tsukada, Kaoru Hashimoto, Nobuo Kamehara
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Patent number: 6097412Abstract: A piezoelectric device including an insulating substrate and a displacement layer formed on the insulating substrate including a first electrode, a piezoelectric layer and a second electrode laid on the insulating substrate in the stated order, a part of a surface of the piezoelectric device in a region where the first and the second electrodes overlap each other is projected out of the rest part of the surface. The multi-layer body has a pair of high rigidity plates each provided on a side-wall for securing the multi-layer body.Type: GrantFiled: May 21, 1998Date of Patent: August 1, 2000Assignee: Fujitsu LimitedInventors: Mineharu Tsukada, Koji Omote, Masaharu Hida, Nobuo Kamehara, Motoyuki Nishizawa, Kazuaki Kurihara
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Patent number: 5994822Abstract: A number of single crystal domains having crystal orientations different from each other cohere to form one grain, and a number of grains cohere to form a piezoelectric material. When a grain has a size exceeding a certain size, cracks take place in the surface of the grain. Because of generation of the cracks constraining forces from adjacent domains are weak, and a displacement which is substantially the same as a displacement ideal to piezoelectric material can be obtained.Type: GrantFiled: February 13, 1998Date of Patent: November 30, 1999Assignee: Fujitsu LimitedInventors: Masao Kondo, Mineharu Tsukada, Masaharu Hida
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Patent number: 5962955Abstract: A piezoelectric device including an insulating substrate and a displacement layer formed on the insulating substrate including a first common electrode, a piezoelectric layer and a plurality of second electrodes laid on the insulating substrate in the stated order, where a part of a surface of the piezoelectric device in a region where the first and the second electrodes overlap each other is projected out of the rest part of the surface. The thus-formed piezoelectric device can increase the amount of displacement of the displacement layer.Type: GrantFiled: February 7, 1997Date of Patent: October 5, 1999Assignee: Fujitsu LimitedInventors: Mineharu Tsukada, Koji Omote, Masaharu Hida, Nobuo Kamehara, Motoyuki Nishizawa, Kazuaki Kurihara
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Patent number: 5683529Abstract: A process of producing a multiple-layer circuit board of aluminum nitride, including the steps of: preparing green sheets of aluminum nitride, forming on the green sheets conductor patterns of a conductor paste containing tungsten as a main conductor component, laminating the green sheets with the conductor patterns formed thereon to form a lamination, and firing the lamination in a container made of boron nitride and in a pressurized nitrogen gas atmosphere.Type: GrantFiled: June 11, 1996Date of Patent: November 4, 1997Assignee: Fujitsu LimitedInventors: Hiroshi Makihara, Koji Omote, Nobuo Kamehara, Mineharu Tsukada
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Patent number: 5607535Abstract: A method of manufacturing a laminated piezoelectric actuator including at least an actuator element which has a plurality of piezoelectric ceramics layers and internal electrode layers laminated alternately and external electrodes which connect alternate internal electrode layers in two groups.Type: GrantFiled: February 25, 1994Date of Patent: March 4, 1997Assignee: Fujitsu, Ltd.Inventors: Mineharu Tsukada, Koji Omote
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Patent number: 5575872Abstract: A laminated body of a plurality of slit ceramic green sheets 10 with rod-shaped members 11 placed in the spaces defined by the slits 9 is sandwiched by two laminated ceramic green bodies of a plurality of blank ceramic green sheets 8, pressing to make the laminated ceramic green bodies integral with each other, and then after the rod-shaped members 11 are pulled out, the integrated laminated ceramic green bodies are sintered. Thus circular sectional channels 13 with reduced flow resistance for a coolant flowing therethrough are formed inside the ceramic circuit substrate 14. The channels 13 can have low flow resistance and can have high cooling efficiency.Type: GrantFiled: June 10, 1994Date of Patent: November 19, 1996Assignee: Fujitsu LimitedInventors: Mineharu Tsukada, Masaharu Hida, Koji Omote
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Patent number: 5443786Abstract: A composition for the formation of vias on a ceramic substrate, the composition including (a) at least one powder containing copper, gold, silver, tungsten, molybdenum, nickel, palladium, platinum, aluminium, or an alloy thereof; and (b) 5 to 40 wt %, based on the weight of the powder in the composition, of one or more of an organosilicic compound, an organoaluminium compound, an organozirconium compound, and an organomagnesium compound. A further embodiment of a composition for the formation of vias includes (a) and (b) above and, in addition, (c) a binder material including a cellulose derivative or a heat decomposable polymethamethyl acrylate binder, and (d) a high boiling point organic solvent. The invention also includes a method for use in the formation of vias on a substrate having perforating holes therein. Such a substrate could be a glass ceramic composite substrate, an alumina substrate, a magnesia substrate, a zirconia substrate, or green sheets thereof.Type: GrantFiled: December 17, 1991Date of Patent: August 22, 1995Assignee: Fujitsu LimitedInventors: Hiromitsu Yokoyama, Koji Omote, Hitoshi Suzuki, Mineharu Tsukada, Nobuo Kamehara, Koichi Niwa
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Patent number: 5015314Abstract: A method for producing a ceramic circuit board comprising the steps of (i) forming a conductor portion of the ceramic circuit board by printing a conductive paste composition on a ceramic base plate for the circuit board and then (ii) firing the ceramic base plate and the conductive paste composition together, wherein a copper-base composition comprising a copper powder and 0.5 to 5 parts by weight, based on 100 parts by weight of copper powder, of at least one organo metallic compound capable of forming an inorganic compound or compounds, respectively, when fired in an inert atmosphere, is used as the conductive paste composition.The combined use of isopropyl tridodecylbenzene sulfonyl titanate and isopropyl triisostearoyl titanate greatly improve the flowability of the copper-base conductive paste composition.Type: GrantFiled: January 19, 1990Date of Patent: May 14, 1991Assignee: Fujitsu LimitedInventors: Hitoshi Suzuki, Hiromitsu Yokoyama, Mineharu Tsukada, Hiromi Ogawa, Nobuo Kamehara, Koichi Niwa
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Patent number: 4679320Abstract: A process for producing a multilayer ceramic circuit board with copper including the steps of:forming green sheets by doctoring a slurry which includes 100 parts by weight of glass ceramic particles, 5 to 20 parts by weight of a thermally depolymerizable resin binder, 2 to 10 parts by weight of a plasticizer, and up to 2 parts by weight of a fatty acid ethylene oxide adduct type, deflorculant. The glass ceramic includes 20 to 70% by weight of alumina, and 30 to 80% by weight of SiO.sub.2 -B.sub.2 O.sub.3 glass. The process further includes the steps of forming via holes through the green sheets, screen-printing a copper paste on the green sheets, and laminating the green sheets, thereby forming a multilayer structure and firing the multilayer structure in a non-oxidizable atmosphere.Type: GrantFiled: November 26, 1985Date of Patent: July 14, 1987Assignee: Fujitsu LimitedInventors: Yoshihiko Imanaka, Hiromi Ogawa, Mineharu Tsukada, Etsuro Udagawa, Kazuaki Kurihara, Hiromitsu Yokoyama, Nobuo Kamehara