Patents by Inventor Mineo Katsueda
Mineo Katsueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6865399Abstract: In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.Type: GrantFiled: February 5, 2002Date of Patent: March 8, 2005Assignee: Renesas Technology Corp.Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Patent number: 6535069Abstract: A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive a first frequency f1 and second frequency f2 (f2=2×f1). It includes a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit has a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at harmonics of a frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at harmonics of a frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for matching with f1 and f2.Type: GrantFiled: February 28, 2002Date of Patent: March 18, 2003Assignee: Hitachi, Ltd.Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Publication number: 20020089380Abstract: A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive the first frequency f1 and the second frequency f2 (f2=2×f1) is structured as explained below.Type: ApplicationFiled: February 28, 2002Publication date: July 11, 2002Applicant: Hitachi, Ltd.Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Publication number: 20020082045Abstract: In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body. In addition, a switching element is also provided to such harmonics control circuit to enable the harmonics control without giving any influence on the radio frequency signal of each communication system.Type: ApplicationFiled: February 5, 2002Publication date: June 27, 2002Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Patent number: 6384688Abstract: A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive the first frequency f1 and the second frequency f2 (f2=2×f1) is structured as explained below. This radio frequency power amplifier module for dual-band type mobile communication apparatus is comprised of a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor.Type: GrantFiled: October 25, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Patent number: 6366788Abstract: In a mobile telephone apparatus corresponding to dual-band provided with an RF power module to operate in two kinds of different frequencies, a common harmonics control circuit is provided to the output circuit of such RF power module to realize higher efficiency in view of controlling respective harmonics power for both band frequencies. Moreover, a means for selectively setting the bias is also provided so that the maximum efficiency can be attained depending on the output power required with respective communication systems with the bias control signal output from the CPU of the control unit interlocking with selection of frequency of the mobile telephone apparatus body.Type: GrantFiled: October 26, 2000Date of Patent: April 2, 2002Assignee: Hitachi, Ltd.Inventors: Toru Fujioka, Isao Yoshida, Mineo Katsueda, Masatoshi Morikawa, Yoshikuni Matsunaga, Kenji Sekine, Osamu Kagaya
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Patent number: 5719429Abstract: An insulated gate semiconductor device, which improves high frequency characteristics by reducing the resistance of a path from a gate bonding portion to each gate and eliminating an unbalance in resistances of respective gates, and which obtain a higher output by eliminating a limitation in current capacity due to the thickness of a first metal layer. In this insulated gate semiconductor device, a first aluminum layer is connected in parallel onto a gate electrode made of polycrystalline silicon. The adjacent gates, each having such a double layer structure, extend outside channel regions and are connected to each other. A lead-out electrode of a second aluminum layer is connected to the center of the connection portion of the adjacent gates through an opening portion. A gate bonding portion is provided at the center of the lead-out electrode. Each of source and drain electrodes is also of a double layer structure having the first aluminum layer and the second aluminum layer.Type: GrantFiled: December 27, 1995Date of Patent: February 17, 1998Assignee: Hitachi, Ltd.Inventors: Isao Yoshida, Mineo Katsueda, Yasuo Maruyama
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Patent number: 4492974Abstract: A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.Type: GrantFiled: February 22, 1982Date of Patent: January 8, 1985Assignee: Hitachi, Ltd.Inventors: Isao Yoshida, Takeaki Okabe, Mineo Katsueda, Minoru Nagata, Toshiaki Masuhara, Kazutoshi Ashikawa, Hideaki Kato, Mitsuo Ito, Shigeo Ohtaka, Osamu Minato, Yoshio Sakai
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Patent number: 4213140Abstract: An insulated-gate semiconductor device wherein a first region is formed in the surface of a semiconductor substrate, the first region having a conductivity type opposite to that of the substrate, two insulated-gate FET's are formed within the first region, the drain of the first insulated-gate FET and that of the second insulated-gate FET are made common, the drains are electrically connected to the first region, and the gate of the first insulated-gate FET and the source of the second insulated-gate FET, and the gate of the second insulated-gate FET and the source of the first insulated-gate FET are respectively connected, thereby to prevent the occurrence of a negative resistance.Type: GrantFiled: July 6, 1978Date of Patent: July 15, 1980Assignee: Hitachi, Ltd.Inventors: Takeaki Okabe, Isao Yoshida, Mineo Katsueda, Hidefumi Ito, Masatomo Furumi, Shikayuki Ochi
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Patent number: 4172260Abstract: In an insulated gate field effect transistor having a source region and a drain region of the P-conductivity type which are disposed in surface portions of a semiconductor substrate of the N-conductivity type in a manner to be spaced apart from each other, a gate electrode being disposed through an insulating film on the substrate between the source region and the drain region, an insulated gate field effect transistor wherein said drain region is disposed apart from said gate electrode, two regions of an intermediate region and a high resistance region which are of the P-conductivity type and which successively extend from said drain region towards the side of said gate electrode are disposed in surface portions of the substrate situated between said drain region and said gate electrode, said intermediate region having an impurity concentration lower than that of said drain region, said high resistance region having an impurity concentration lower than that of said intermediate region, and a source electrodeType: GrantFiled: November 21, 1977Date of Patent: October 23, 1979Assignee: Hitachi, Ltd.Inventors: Takeaki Okabe, Isao Yoshida, Shikayuki Ochi, Hidefumi Itoh, Masatomo Furumi, Toru Toyabe, Mineo Katsueda, Yukio Shirota
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Patent number: 3978369Abstract: A solid state starter apparatus for a discharge lamp comprises a current limiter, an AC power supply, a discharge lamp of filament-preheating type and a switching circuit for controlling the turning on and off of the discharge lamp. The switching circuit further includes a lightedstate detector circuit for detecting the turning on or off of the discharge lamp, a current breaker circuit controlled by the lighted-state detector circuit to cause the filament current to be turned on and off, and a preheater circuit for starting to supply a filament preheating current in accordance with the magnitude of the current controlled by the current breaker circuit.Type: GrantFiled: January 7, 1975Date of Patent: August 31, 1976Assignee: Hitachi, Ltd.Inventors: Ichiro Imaizumi, Teruichi Tomura, Mitsuo Akatsuka, Mineo Katsueda, Toshiaki Okada, Hiroyuki Iyama