Abstract: Scalable life-cycle maintenance of hardware. In an embodiment, a software-defined Preboot eXecution Environment (PXE) server is executed to receive a request, comprising an identifier, from hardware. The identifier is compared to a plurality of attribute sets. When the identifier does not match any of the attribute sets, a task graph is generated for a PXE process for the hardware, and an initial stage of the task graph is initiated. Otherwise, when the identifier matches one of the attribute sets, the task graph associated with that attribute set is retrieved, and the a next stage in the task graph is initiated. In addition, a display key may be used to tether hardware with a user system. Furthermore, hardware may be validated by comparing signatures using a validating operating system, and a boot order of operating systems in the hardware may be changed once the hardware device is validated.

Abstract: Scalable life-cycle maintenance of hardware. In an embodiment, a software-defined Preboot eXecution Environment (PXE) server is executed to receive a request, comprising an identifier, from hardware. The identifier is compared to a plurality of attribute sets. When the identifier does not match any of the attribute sets, a task graph is generated for a PXE process for the hardware, and an initial stage of the task graph is initiated. Otherwise, when the identifier matches one of the attribute sets, the task graph associated with that attribute set is retrieved, and the a next stage in the task graph is initiated. In addition, a display key may be used to tether hardware with a user system. Furthermore, hardware may be validated by comparing signatures using a validating operating system, and a boot order of operating systems in the hardware may be changed once the hardware device is validated.

Abstract: Scalable life-cycle maintenance of hardware. In an embodiment, a software-defined Preboot eXecution Environment (PXE) server is executed to receive a request, comprising an identifier, from hardware. The identifier is compared to a plurality of attribute sets. When the identifier does not match any of the attribute sets, a task graph is generated for a PXE process for the hardware, and an initial stage of the task graph is initiated. Otherwise, when the identifier matches one of the attribute sets, the task graph associated with that attribute set is retrieved, and the next stage in the task graph is initiated. In addition, a display key may be used to tether hardware with a user system. Furthermore, hardware may be validated by comparing signatures using a validating operating system, and a boot order of operating systems in the hardware may be changed once the hardware device is validated.

Abstract: Scalable life-cycle maintenance of hardware. In an embodiment, a software-defined Preboot eXecution Environment (PXE) server is executed to receive a request, comprising an identifier, from hardware. The identifier is compared to a plurality of attribute sets. When the identifier does not match any of the attribute sets, a task graph is generated for a PXE process for the hardware, and an initial stage of the task graph is initiated. Otherwise, when the identifier matches one of the attribute sets, the task graph associated with that attribute set is retrieved, and the next stage in the task graph is initiated. In addition, a display key may be used to tether hardware with a user system. Furthermore, hardware may be validated by comparing signatures using a validating operating system, and a boot order of operating systems in the hardware may be changed once the hardware device is validated.

Abstract: The present invention is directed to a parallel processing infrastructure, which enables the robust design of task scheduler(s) and communication primitive(s). This is achieved, in one embodiment of the present invention, by decomposing the general problem of exploiting parallelism into three parts. First, an infrastructure is provided to track resources. Second, a method is offered by which to expose the tracking of the aforementioned resources to task scheduler(s) and communication primitive(s). Third, a method is established by which task scheduler(s) in turn may enable and/or disable communication primitive(s). In this manner, an improved parallel processing infrastructure is provided.

Abstract: The present invention is directed to a parallel processing infrastructure, which enables the robust design of task scheduler(s) and communication primitive(s). This is achieved, in one embodiment of the present invention, by decomposing the general problem of exploiting parallelism into three parts. First, an infrastructure is provided to track resources. Second, a method is offered by which to expose the tracking of the aforementioned resources to task scheduler(s) and communication primitive(s). Third, a method is established by which task scheduler(s) in turn may enable and/or disable communication primitive(s). In this manner, an improved parallel processing infrastructure is provided.

Abstract: The present invention is directed to a parallel processing infrastructure, which enables the robust design of task scheduler(s) and communication primitive(s). This is achieved, in one embodiment of the present invention, by decomposing the general problem of exploiting parallelism into three parts. First, an infrastructure is provided to track resources. Second, a method is offered by which to expose the tracking of the aforementioned resources to task scheduler(s) and communication primitive(s). Third, a method is established by which task scheduler(s) in turn may enable and/or disable communication primitive(s). In this manner, an improved parallel processing infrastructure is provided.

Abstract: The present invention is directed to a parallel processing infrastructure, which enables the robust design of task scheduler(s) and communication primitive(s). This is achieved, in one embodiment of the present invention, by decomposing the general problem of exploiting parallelism into three parts. First, an infrastructure is provided to track resources. Second, a method is offered by which to expose the tracking of the aforementioned resources to task scheduler(s) and communication primitive(s). Third, a method is established by which task scheduler(s) in turn may enable and/or disable communication primitive(s). In this manner, an improved parallel processing infrastructure is provided.

Abstract: The present invention is directed to a parallel processing infrastructure, which enables the robust design of task scheduler(s) and communication primitive(s). This is achieved, in one embodiment of the present invention, by decomposing the general problem of exploiting parallelism into three parts. First, an infrastructure is provided to track resources. Second, a method is offered by which to expose the tracking of the aforementioned resources to task scheduler(s) and communication primitive(s). Third, a method is established by which task scheduler(s) in turn may enable and/or disable communication primitive(s). In this manner, an improved parallel processing infrastructure is provided.